|
 |
5544c1 |
From 5d38110b1e23c963302f13f5917001a9298445a7 Mon Sep 17 00:00:00 2001
|
|
|
5544c1 |
From: Blue Swirl <blauwirbel@gmail.com>
|
|
|
5544c1 |
Date: Sun, 2 Sep 2012 07:33:36 +0000
|
|
|
5544c1 |
Subject: [PATCH] target-s390x: avoid AREG0 for FPU helpers
|
|
|
5544c1 |
|
|
|
5544c1 |
Make FPU helpers take a parameter for CPUState instead
|
|
|
5544c1 |
of relying on global env.
|
|
|
5544c1 |
|
|
|
5544c1 |
Introduce temporary wrappers for FPU load and store ops.
|
|
|
5544c1 |
|
|
|
5544c1 |
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
|
|
|
5544c1 |
Signed-off-by: Alexander Graf <agraf@suse.de>
|
|
|
5544c1 |
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
|
|
|
5544c1 |
---
|
|
|
5544c1 |
target-s390x/Makefile.objs | 1 -
|
|
|
5544c1 |
target-s390x/cc_helper.c | 4 +-
|
|
|
5544c1 |
target-s390x/cpu.h | 14 +++-
|
|
|
5544c1 |
target-s390x/fpu_helper.c | 184 +++++++++++++++++++++++----------------------
|
|
|
5544c1 |
target-s390x/helper.h | 126 +++++++++++++++----------------
|
|
|
5544c1 |
target-s390x/mem_helper.c | 49 ++++++++++++
|
|
|
5544c1 |
target-s390x/translate.c | 70 ++++++++---------
|
|
|
5544c1 |
7 files changed, 257 insertions(+), 191 deletions(-)
|
|
|
5544c1 |
|
|
|
5544c1 |
diff --git a/target-s390x/Makefile.objs b/target-s390x/Makefile.objs
|
|
|
5544c1 |
index a87d26f..7d965e9 100644
|
|
|
5544c1 |
--- a/target-s390x/Makefile.objs
|
|
|
5544c1 |
+++ b/target-s390x/Makefile.objs
|
|
|
5544c1 |
@@ -4,7 +4,6 @@ obj-$(CONFIG_SOFTMMU) += machine.o
|
|
|
5544c1 |
obj-$(CONFIG_KVM) += kvm.o
|
|
|
5544c1 |
|
|
|
5544c1 |
$(obj)/int_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS)
|
|
|
5544c1 |
-$(obj)/fpu_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS)
|
|
|
5544c1 |
$(obj)/cc_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS)
|
|
|
5544c1 |
$(obj)/mem_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS)
|
|
|
5544c1 |
$(obj)/misc_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS)
|
|
|
5544c1 |
diff --git a/target-s390x/cc_helper.c b/target-s390x/cc_helper.c
|
|
|
5544c1 |
index 2ac1659..9c3a2c4 100644
|
|
|
5544c1 |
--- a/target-s390x/cc_helper.c
|
|
|
5544c1 |
+++ b/target-s390x/cc_helper.c
|
|
|
5544c1 |
@@ -473,10 +473,10 @@ static inline uint32_t do_calc_cc(CPUS390XState *env, uint32_t cc_op,
|
|
|
5544c1 |
break;
|
|
|
5544c1 |
|
|
|
5544c1 |
case CC_OP_LTGT_F32:
|
|
|
5544c1 |
- r = set_cc_f32(src, dst);
|
|
|
5544c1 |
+ r = set_cc_f32(env, src, dst);
|
|
|
5544c1 |
break;
|
|
|
5544c1 |
case CC_OP_LTGT_F64:
|
|
|
5544c1 |
- r = set_cc_f64(src, dst);
|
|
|
5544c1 |
+ r = set_cc_f64(env, src, dst);
|
|
|
5544c1 |
break;
|
|
|
5544c1 |
case CC_OP_NZ_F32:
|
|
|
5544c1 |
r = set_cc_nz_f32(dst);
|
|
|
5544c1 |
diff --git a/target-s390x/cpu.h b/target-s390x/cpu.h
|
|
|
5544c1 |
index 0ccb551..9b7a2e3 100644
|
|
|
5544c1 |
--- a/target-s390x/cpu.h
|
|
|
5544c1 |
+++ b/target-s390x/cpu.h
|
|
|
5544c1 |
@@ -1000,12 +1000,22 @@ static inline void cpu_pc_from_tb(CPUS390XState *env, TranslationBlock* tb)
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
/* fpu_helper.c */
|
|
|
5544c1 |
-uint32_t set_cc_f32(float32 v1, float32 v2);
|
|
|
5544c1 |
-uint32_t set_cc_f64(float64 v1, float64 v2);
|
|
|
5544c1 |
+uint32_t set_cc_f32(CPUS390XState *env, float32 v1, float32 v2);
|
|
|
5544c1 |
+uint32_t set_cc_f64(CPUS390XState *env, float64 v1, float64 v2);
|
|
|
5544c1 |
uint32_t set_cc_nz_f32(float32 v);
|
|
|
5544c1 |
uint32_t set_cc_nz_f64(float64 v);
|
|
|
5544c1 |
|
|
|
5544c1 |
/* misc_helper.c */
|
|
|
5544c1 |
void program_interrupt(CPUS390XState *env, uint32_t code, int ilc);
|
|
|
5544c1 |
|
|
|
5544c1 |
+/* temporary wrappers */
|
|
|
5544c1 |
+uint32_t cpu_ldub_data(CPUS390XState *env, target_ulong ptr);
|
|
|
5544c1 |
+uint32_t cpu_lduw_data(CPUS390XState *env, target_ulong ptr);
|
|
|
5544c1 |
+uint32_t cpu_ldl_data(CPUS390XState *env, target_ulong ptr);
|
|
|
5544c1 |
+uint64_t cpu_ldq_data(CPUS390XState *env, target_ulong ptr);
|
|
|
5544c1 |
+
|
|
|
5544c1 |
+void cpu_stb_data(CPUS390XState *env, target_ulong ptr, uint32_t data);
|
|
|
5544c1 |
+void cpu_stw_data(CPUS390XState *env, target_ulong ptr, uint32_t data);
|
|
|
5544c1 |
+void cpu_stl_data(CPUS390XState *env, target_ulong ptr, uint32_t data);
|
|
|
5544c1 |
+void cpu_stq_data(CPUS390XState *env, target_ulong ptr, uint64_t data);
|
|
|
5544c1 |
#endif
|
|
|
5544c1 |
diff --git a/target-s390x/fpu_helper.c b/target-s390x/fpu_helper.c
|
|
|
5544c1 |
index 1389052..e235419 100644
|
|
|
5544c1 |
--- a/target-s390x/fpu_helper.c
|
|
|
5544c1 |
+++ b/target-s390x/fpu_helper.c
|
|
|
5544c1 |
@@ -19,10 +19,10 @@
|
|
|
5544c1 |
*/
|
|
|
5544c1 |
|
|
|
5544c1 |
#include "cpu.h"
|
|
|
5544c1 |
-#include "dyngen-exec.h"
|
|
|
5544c1 |
#include "helper.h"
|
|
|
5544c1 |
|
|
|
5544c1 |
-#if !defined(CONFIG_USER_ONLY)
|
|
|
5544c1 |
+/* temporarily disabled due to wrapper use */
|
|
|
5544c1 |
+#if 0 && !defined(CONFIG_USER_ONLY)
|
|
|
5544c1 |
#include "softmmu_exec.h"
|
|
|
5544c1 |
#endif
|
|
|
5544c1 |
|
|
|
5544c1 |
@@ -33,7 +33,7 @@
|
|
|
5544c1 |
#define HELPER_LOG(x...)
|
|
|
5544c1 |
#endif
|
|
|
5544c1 |
|
|
|
5544c1 |
-static inline int float_comp_to_cc(int float_compare)
|
|
|
5544c1 |
+static inline int float_comp_to_cc(CPUS390XState *env, int float_compare)
|
|
|
5544c1 |
{
|
|
|
5544c1 |
switch (float_compare) {
|
|
|
5544c1 |
case float_relation_equal:
|
|
|
5544c1 |
@@ -50,14 +50,16 @@ static inline int float_comp_to_cc(int float_compare)
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
/* condition codes for binary FP ops */
|
|
|
5544c1 |
-uint32_t set_cc_f32(float32 v1, float32 v2)
|
|
|
5544c1 |
+uint32_t set_cc_f32(CPUS390XState *env, float32 v1, float32 v2)
|
|
|
5544c1 |
{
|
|
|
5544c1 |
- return float_comp_to_cc(float32_compare_quiet(v1, v2, &env->fpu_status));
|
|
|
5544c1 |
+ return float_comp_to_cc(env, float32_compare_quiet(v1, v2,
|
|
|
5544c1 |
+ &env->fpu_status));
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
-uint32_t set_cc_f64(float64 v1, float64 v2)
|
|
|
5544c1 |
+uint32_t set_cc_f64(CPUS390XState *env, float64 v1, float64 v2)
|
|
|
5544c1 |
{
|
|
|
5544c1 |
- return float_comp_to_cc(float64_compare_quiet(v1, v2, &env->fpu_status));
|
|
|
5544c1 |
+ return float_comp_to_cc(env, float64_compare_quiet(v1, v2,
|
|
|
5544c1 |
+ &env->fpu_status));
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
/* condition codes for unary FP ops */
|
|
|
5544c1 |
@@ -101,14 +103,14 @@ static uint32_t set_cc_nz_f128(float128 v)
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
/* convert 32-bit int to 64-bit float */
|
|
|
5544c1 |
-void HELPER(cdfbr)(uint32_t f1, int32_t v2)
|
|
|
5544c1 |
+void HELPER(cdfbr)(CPUS390XState *env, uint32_t f1, int32_t v2)
|
|
|
5544c1 |
{
|
|
|
5544c1 |
HELPER_LOG("%s: converting %d to f%d\n", __func__, v2, f1);
|
|
|
5544c1 |
env->fregs[f1].d = int32_to_float64(v2, &env->fpu_status);
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
/* convert 32-bit int to 128-bit float */
|
|
|
5544c1 |
-void HELPER(cxfbr)(uint32_t f1, int32_t v2)
|
|
|
5544c1 |
+void HELPER(cxfbr)(CPUS390XState *env, uint32_t f1, int32_t v2)
|
|
|
5544c1 |
{
|
|
|
5544c1 |
CPU_QuadU v1;
|
|
|
5544c1 |
|
|
|
5544c1 |
@@ -118,21 +120,21 @@ void HELPER(cxfbr)(uint32_t f1, int32_t v2)
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
/* convert 64-bit int to 32-bit float */
|
|
|
5544c1 |
-void HELPER(cegbr)(uint32_t f1, int64_t v2)
|
|
|
5544c1 |
+void HELPER(cegbr)(CPUS390XState *env, uint32_t f1, int64_t v2)
|
|
|
5544c1 |
{
|
|
|
5544c1 |
HELPER_LOG("%s: converting %ld to f%d\n", __func__, v2, f1);
|
|
|
5544c1 |
env->fregs[f1].l.upper = int64_to_float32(v2, &env->fpu_status);
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
/* convert 64-bit int to 64-bit float */
|
|
|
5544c1 |
-void HELPER(cdgbr)(uint32_t f1, int64_t v2)
|
|
|
5544c1 |
+void HELPER(cdgbr)(CPUS390XState *env, uint32_t f1, int64_t v2)
|
|
|
5544c1 |
{
|
|
|
5544c1 |
HELPER_LOG("%s: converting %ld to f%d\n", __func__, v2, f1);
|
|
|
5544c1 |
env->fregs[f1].d = int64_to_float64(v2, &env->fpu_status);
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
/* convert 64-bit int to 128-bit float */
|
|
|
5544c1 |
-void HELPER(cxgbr)(uint32_t f1, int64_t v2)
|
|
|
5544c1 |
+void HELPER(cxgbr)(CPUS390XState *env, uint32_t f1, int64_t v2)
|
|
|
5544c1 |
{
|
|
|
5544c1 |
CPU_QuadU x1;
|
|
|
5544c1 |
|
|
|
5544c1 |
@@ -144,7 +146,7 @@ void HELPER(cxgbr)(uint32_t f1, int64_t v2)
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
/* convert 32-bit int to 32-bit float */
|
|
|
5544c1 |
-void HELPER(cefbr)(uint32_t f1, int32_t v2)
|
|
|
5544c1 |
+void HELPER(cefbr)(CPUS390XState *env, uint32_t f1, int32_t v2)
|
|
|
5544c1 |
{
|
|
|
5544c1 |
env->fregs[f1].l.upper = int32_to_float32(v2, &env->fpu_status);
|
|
|
5544c1 |
HELPER_LOG("%s: converting %d to 0x%d in f%d\n", __func__, v2,
|
|
|
5544c1 |
@@ -152,7 +154,7 @@ void HELPER(cefbr)(uint32_t f1, int32_t v2)
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
/* 32-bit FP addition RR */
|
|
|
5544c1 |
-uint32_t HELPER(aebr)(uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
+uint32_t HELPER(aebr)(CPUS390XState *env, uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
{
|
|
|
5544c1 |
env->fregs[f1].l.upper = float32_add(env->fregs[f1].l.upper,
|
|
|
5544c1 |
env->fregs[f2].l.upper,
|
|
|
5544c1 |
@@ -164,7 +166,7 @@ uint32_t HELPER(aebr)(uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
/* 64-bit FP addition RR */
|
|
|
5544c1 |
-uint32_t HELPER(adbr)(uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
+uint32_t HELPER(adbr)(CPUS390XState *env, uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
{
|
|
|
5544c1 |
env->fregs[f1].d = float64_add(env->fregs[f1].d, env->fregs[f2].d,
|
|
|
5544c1 |
&env->fpu_status);
|
|
|
5544c1 |
@@ -175,7 +177,7 @@ uint32_t HELPER(adbr)(uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
/* 32-bit FP subtraction RR */
|
|
|
5544c1 |
-uint32_t HELPER(sebr)(uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
+uint32_t HELPER(sebr)(CPUS390XState *env, uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
{
|
|
|
5544c1 |
env->fregs[f1].l.upper = float32_sub(env->fregs[f1].l.upper,
|
|
|
5544c1 |
env->fregs[f2].l.upper,
|
|
|
5544c1 |
@@ -187,7 +189,7 @@ uint32_t HELPER(sebr)(uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
/* 64-bit FP subtraction RR */
|
|
|
5544c1 |
-uint32_t HELPER(sdbr)(uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
+uint32_t HELPER(sdbr)(CPUS390XState *env, uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
{
|
|
|
5544c1 |
env->fregs[f1].d = float64_sub(env->fregs[f1].d, env->fregs[f2].d,
|
|
|
5544c1 |
&env->fpu_status);
|
|
|
5544c1 |
@@ -198,7 +200,7 @@ uint32_t HELPER(sdbr)(uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
/* 32-bit FP division RR */
|
|
|
5544c1 |
-void HELPER(debr)(uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
+void HELPER(debr)(CPUS390XState *env, uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
{
|
|
|
5544c1 |
env->fregs[f1].l.upper = float32_div(env->fregs[f1].l.upper,
|
|
|
5544c1 |
env->fregs[f2].l.upper,
|
|
|
5544c1 |
@@ -206,7 +208,7 @@ void HELPER(debr)(uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
/* 128-bit FP division RR */
|
|
|
5544c1 |
-void HELPER(dxbr)(uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
+void HELPER(dxbr)(CPUS390XState *env, uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
{
|
|
|
5544c1 |
CPU_QuadU v1;
|
|
|
5544c1 |
CPU_QuadU v2;
|
|
|
5544c1 |
@@ -222,14 +224,14 @@ void HELPER(dxbr)(uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
/* 64-bit FP multiplication RR */
|
|
|
5544c1 |
-void HELPER(mdbr)(uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
+void HELPER(mdbr)(CPUS390XState *env, uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
{
|
|
|
5544c1 |
env->fregs[f1].d = float64_mul(env->fregs[f1].d, env->fregs[f2].d,
|
|
|
5544c1 |
&env->fpu_status);
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
/* 128-bit FP multiplication RR */
|
|
|
5544c1 |
-void HELPER(mxbr)(uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
+void HELPER(mxbr)(CPUS390XState *env, uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
{
|
|
|
5544c1 |
CPU_QuadU v1;
|
|
|
5544c1 |
CPU_QuadU v2;
|
|
|
5544c1 |
@@ -245,14 +247,14 @@ void HELPER(mxbr)(uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
/* convert 32-bit float to 64-bit float */
|
|
|
5544c1 |
-void HELPER(ldebr)(uint32_t r1, uint32_t r2)
|
|
|
5544c1 |
+void HELPER(ldebr)(CPUS390XState *env, uint32_t r1, uint32_t r2)
|
|
|
5544c1 |
{
|
|
|
5544c1 |
env->fregs[r1].d = float32_to_float64(env->fregs[r2].l.upper,
|
|
|
5544c1 |
&env->fpu_status);
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
/* convert 128-bit float to 64-bit float */
|
|
|
5544c1 |
-void HELPER(ldxbr)(uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
+void HELPER(ldxbr)(CPUS390XState *env, uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
{
|
|
|
5544c1 |
CPU_QuadU x2;
|
|
|
5544c1 |
|
|
|
5544c1 |
@@ -263,7 +265,7 @@ void HELPER(ldxbr)(uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
/* convert 64-bit float to 128-bit float */
|
|
|
5544c1 |
-void HELPER(lxdbr)(uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
+void HELPER(lxdbr)(CPUS390XState *env, uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
{
|
|
|
5544c1 |
CPU_QuadU res;
|
|
|
5544c1 |
|
|
|
5544c1 |
@@ -273,7 +275,7 @@ void HELPER(lxdbr)(uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
/* convert 64-bit float to 32-bit float */
|
|
|
5544c1 |
-void HELPER(ledbr)(uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
+void HELPER(ledbr)(CPUS390XState *env, uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
{
|
|
|
5544c1 |
float64 d2 = env->fregs[f2].d;
|
|
|
5544c1 |
|
|
|
5544c1 |
@@ -281,7 +283,7 @@ void HELPER(ledbr)(uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
/* convert 128-bit float to 32-bit float */
|
|
|
5544c1 |
-void HELPER(lexbr)(uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
+void HELPER(lexbr)(CPUS390XState *env, uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
{
|
|
|
5544c1 |
CPU_QuadU x2;
|
|
|
5544c1 |
|
|
|
5544c1 |
@@ -292,7 +294,7 @@ void HELPER(lexbr)(uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
/* absolute value of 32-bit float */
|
|
|
5544c1 |
-uint32_t HELPER(lpebr)(uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
+uint32_t HELPER(lpebr)(CPUS390XState *env, uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
{
|
|
|
5544c1 |
float32 v1;
|
|
|
5544c1 |
float32 v2 = env->fregs[f2].d;
|
|
|
5544c1 |
@@ -303,7 +305,7 @@ uint32_t HELPER(lpebr)(uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
/* absolute value of 64-bit float */
|
|
|
5544c1 |
-uint32_t HELPER(lpdbr)(uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
+uint32_t HELPER(lpdbr)(CPUS390XState *env, uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
{
|
|
|
5544c1 |
float64 v1;
|
|
|
5544c1 |
float64 v2 = env->fregs[f2].d;
|
|
|
5544c1 |
@@ -314,7 +316,7 @@ uint32_t HELPER(lpdbr)(uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
/* absolute value of 128-bit float */
|
|
|
5544c1 |
-uint32_t HELPER(lpxbr)(uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
+uint32_t HELPER(lpxbr)(CPUS390XState *env, uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
{
|
|
|
5544c1 |
CPU_QuadU v1;
|
|
|
5544c1 |
CPU_QuadU v2;
|
|
|
5544c1 |
@@ -328,21 +330,21 @@ uint32_t HELPER(lpxbr)(uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
/* load and test 64-bit float */
|
|
|
5544c1 |
-uint32_t HELPER(ltdbr)(uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
+uint32_t HELPER(ltdbr)(CPUS390XState *env, uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
{
|
|
|
5544c1 |
env->fregs[f1].d = env->fregs[f2].d;
|
|
|
5544c1 |
return set_cc_nz_f64(env->fregs[f1].d);
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
/* load and test 32-bit float */
|
|
|
5544c1 |
-uint32_t HELPER(ltebr)(uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
+uint32_t HELPER(ltebr)(CPUS390XState *env, uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
{
|
|
|
5544c1 |
env->fregs[f1].l.upper = env->fregs[f2].l.upper;
|
|
|
5544c1 |
return set_cc_nz_f32(env->fregs[f1].l.upper);
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
/* load and test 128-bit float */
|
|
|
5544c1 |
-uint32_t HELPER(ltxbr)(uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
+uint32_t HELPER(ltxbr)(CPUS390XState *env, uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
{
|
|
|
5544c1 |
CPU_QuadU x;
|
|
|
5544c1 |
|
|
|
5544c1 |
@@ -354,7 +356,7 @@ uint32_t HELPER(ltxbr)(uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
/* load complement of 32-bit float */
|
|
|
5544c1 |
-uint32_t HELPER(lcebr)(uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
+uint32_t HELPER(lcebr)(CPUS390XState *env, uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
{
|
|
|
5544c1 |
env->fregs[f1].l.upper = float32_chs(env->fregs[f2].l.upper);
|
|
|
5544c1 |
|
|
|
5544c1 |
@@ -362,7 +364,7 @@ uint32_t HELPER(lcebr)(uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
/* load complement of 64-bit float */
|
|
|
5544c1 |
-uint32_t HELPER(lcdbr)(uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
+uint32_t HELPER(lcdbr)(CPUS390XState *env, uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
{
|
|
|
5544c1 |
env->fregs[f1].d = float64_chs(env->fregs[f2].d);
|
|
|
5544c1 |
|
|
|
5544c1 |
@@ -370,7 +372,7 @@ uint32_t HELPER(lcdbr)(uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
/* load complement of 128-bit float */
|
|
|
5544c1 |
-uint32_t HELPER(lcxbr)(uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
+uint32_t HELPER(lcxbr)(CPUS390XState *env, uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
{
|
|
|
5544c1 |
CPU_QuadU x1, x2;
|
|
|
5544c1 |
|
|
|
5544c1 |
@@ -383,7 +385,7 @@ uint32_t HELPER(lcxbr)(uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
/* 32-bit FP addition RM */
|
|
|
5544c1 |
-void HELPER(aeb)(uint32_t f1, uint32_t val)
|
|
|
5544c1 |
+void HELPER(aeb)(CPUS390XState *env, uint32_t f1, uint32_t val)
|
|
|
5544c1 |
{
|
|
|
5544c1 |
float32 v1 = env->fregs[f1].l.upper;
|
|
|
5544c1 |
CPU_FloatU v2;
|
|
|
5544c1 |
@@ -395,7 +397,7 @@ void HELPER(aeb)(uint32_t f1, uint32_t val)
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
/* 32-bit FP division RM */
|
|
|
5544c1 |
-void HELPER(deb)(uint32_t f1, uint32_t val)
|
|
|
5544c1 |
+void HELPER(deb)(CPUS390XState *env, uint32_t f1, uint32_t val)
|
|
|
5544c1 |
{
|
|
|
5544c1 |
float32 v1 = env->fregs[f1].l.upper;
|
|
|
5544c1 |
CPU_FloatU v2;
|
|
|
5544c1 |
@@ -407,7 +409,7 @@ void HELPER(deb)(uint32_t f1, uint32_t val)
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
/* 32-bit FP multiplication RM */
|
|
|
5544c1 |
-void HELPER(meeb)(uint32_t f1, uint32_t val)
|
|
|
5544c1 |
+void HELPER(meeb)(CPUS390XState *env, uint32_t f1, uint32_t val)
|
|
|
5544c1 |
{
|
|
|
5544c1 |
float32 v1 = env->fregs[f1].l.upper;
|
|
|
5544c1 |
CPU_FloatU v2;
|
|
|
5544c1 |
@@ -419,29 +421,29 @@ void HELPER(meeb)(uint32_t f1, uint32_t val)
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
/* 32-bit FP compare RR */
|
|
|
5544c1 |
-uint32_t HELPER(cebr)(uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
+uint32_t HELPER(cebr)(CPUS390XState *env, uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
{
|
|
|
5544c1 |
float32 v1 = env->fregs[f1].l.upper;
|
|
|
5544c1 |
float32 v2 = env->fregs[f2].l.upper;
|
|
|
5544c1 |
|
|
|
5544c1 |
HELPER_LOG("%s: comparing 0x%d from f%d and 0x%d\n", __func__,
|
|
|
5544c1 |
v1, f1, v2);
|
|
|
5544c1 |
- return set_cc_f32(v1, v2);
|
|
|
5544c1 |
+ return set_cc_f32(env, v1, v2);
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
/* 64-bit FP compare RR */
|
|
|
5544c1 |
-uint32_t HELPER(cdbr)(uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
+uint32_t HELPER(cdbr)(CPUS390XState *env, uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
{
|
|
|
5544c1 |
float64 v1 = env->fregs[f1].d;
|
|
|
5544c1 |
float64 v2 = env->fregs[f2].d;
|
|
|
5544c1 |
|
|
|
5544c1 |
HELPER_LOG("%s: comparing 0x%ld from f%d and 0x%ld\n", __func__,
|
|
|
5544c1 |
v1, f1, v2);
|
|
|
5544c1 |
- return set_cc_f64(v1, v2);
|
|
|
5544c1 |
+ return set_cc_f64(env, v1, v2);
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
/* 128-bit FP compare RR */
|
|
|
5544c1 |
-uint32_t HELPER(cxbr)(uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
+uint32_t HELPER(cxbr)(CPUS390XState *env, uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
{
|
|
|
5544c1 |
CPU_QuadU v1;
|
|
|
5544c1 |
CPU_QuadU v2;
|
|
|
5544c1 |
@@ -451,29 +453,29 @@ uint32_t HELPER(cxbr)(uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
v2.ll.upper = env->fregs[f2].ll;
|
|
|
5544c1 |
v2.ll.lower = env->fregs[f2 + 2].ll;
|
|
|
5544c1 |
|
|
|
5544c1 |
- return float_comp_to_cc(float128_compare_quiet(v1.q, v2.q,
|
|
|
5544c1 |
+ return float_comp_to_cc(env, float128_compare_quiet(v1.q, v2.q,
|
|
|
5544c1 |
&env->fpu_status));
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
/* 64-bit FP compare RM */
|
|
|
5544c1 |
-uint32_t HELPER(cdb)(uint32_t f1, uint64_t a2)
|
|
|
5544c1 |
+uint32_t HELPER(cdb)(CPUS390XState *env, uint32_t f1, uint64_t a2)
|
|
|
5544c1 |
{
|
|
|
5544c1 |
float64 v1 = env->fregs[f1].d;
|
|
|
5544c1 |
CPU_DoubleU v2;
|
|
|
5544c1 |
|
|
|
5544c1 |
- v2.ll = ldq(a2);
|
|
|
5544c1 |
+ v2.ll = cpu_ldq_data(env, a2);
|
|
|
5544c1 |
HELPER_LOG("%s: comparing 0x%ld from f%d and 0x%lx\n", __func__, v1,
|
|
|
5544c1 |
f1, v2.d);
|
|
|
5544c1 |
- return set_cc_f64(v1, v2.d);
|
|
|
5544c1 |
+ return set_cc_f64(env, v1, v2.d);
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
/* 64-bit FP addition RM */
|
|
|
5544c1 |
-uint32_t HELPER(adb)(uint32_t f1, uint64_t a2)
|
|
|
5544c1 |
+uint32_t HELPER(adb)(CPUS390XState *env, uint32_t f1, uint64_t a2)
|
|
|
5544c1 |
{
|
|
|
5544c1 |
float64 v1 = env->fregs[f1].d;
|
|
|
5544c1 |
CPU_DoubleU v2;
|
|
|
5544c1 |
|
|
|
5544c1 |
- v2.ll = ldq(a2);
|
|
|
5544c1 |
+ v2.ll = cpu_ldq_data(env, a2);
|
|
|
5544c1 |
HELPER_LOG("%s: adding 0x%lx from f%d and 0x%lx\n", __func__,
|
|
|
5544c1 |
v1, f1, v2.d);
|
|
|
5544c1 |
env->fregs[f1].d = v1 = float64_add(v1, v2.d, &env->fpu_status);
|
|
|
5544c1 |
@@ -481,7 +483,7 @@ uint32_t HELPER(adb)(uint32_t f1, uint64_t a2)
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
/* 32-bit FP subtraction RM */
|
|
|
5544c1 |
-void HELPER(seb)(uint32_t f1, uint32_t val)
|
|
|
5544c1 |
+void HELPER(seb)(CPUS390XState *env, uint32_t f1, uint32_t val)
|
|
|
5544c1 |
{
|
|
|
5544c1 |
float32 v1 = env->fregs[f1].l.upper;
|
|
|
5544c1 |
CPU_FloatU v2;
|
|
|
5544c1 |
@@ -491,41 +493,41 @@ void HELPER(seb)(uint32_t f1, uint32_t val)
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
/* 64-bit FP subtraction RM */
|
|
|
5544c1 |
-uint32_t HELPER(sdb)(uint32_t f1, uint64_t a2)
|
|
|
5544c1 |
+uint32_t HELPER(sdb)(CPUS390XState *env, uint32_t f1, uint64_t a2)
|
|
|
5544c1 |
{
|
|
|
5544c1 |
float64 v1 = env->fregs[f1].d;
|
|
|
5544c1 |
CPU_DoubleU v2;
|
|
|
5544c1 |
|
|
|
5544c1 |
- v2.ll = ldq(a2);
|
|
|
5544c1 |
+ v2.ll = cpu_ldq_data(env, a2);
|
|
|
5544c1 |
env->fregs[f1].d = v1 = float64_sub(v1, v2.d, &env->fpu_status);
|
|
|
5544c1 |
return set_cc_nz_f64(v1);
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
/* 64-bit FP multiplication RM */
|
|
|
5544c1 |
-void HELPER(mdb)(uint32_t f1, uint64_t a2)
|
|
|
5544c1 |
+void HELPER(mdb)(CPUS390XState *env, uint32_t f1, uint64_t a2)
|
|
|
5544c1 |
{
|
|
|
5544c1 |
float64 v1 = env->fregs[f1].d;
|
|
|
5544c1 |
CPU_DoubleU v2;
|
|
|
5544c1 |
|
|
|
5544c1 |
- v2.ll = ldq(a2);
|
|
|
5544c1 |
+ v2.ll = cpu_ldq_data(env, a2);
|
|
|
5544c1 |
HELPER_LOG("%s: multiplying 0x%lx from f%d and 0x%ld\n", __func__,
|
|
|
5544c1 |
v1, f1, v2.d);
|
|
|
5544c1 |
env->fregs[f1].d = float64_mul(v1, v2.d, &env->fpu_status);
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
/* 64-bit FP division RM */
|
|
|
5544c1 |
-void HELPER(ddb)(uint32_t f1, uint64_t a2)
|
|
|
5544c1 |
+void HELPER(ddb)(CPUS390XState *env, uint32_t f1, uint64_t a2)
|
|
|
5544c1 |
{
|
|
|
5544c1 |
float64 v1 = env->fregs[f1].d;
|
|
|
5544c1 |
CPU_DoubleU v2;
|
|
|
5544c1 |
|
|
|
5544c1 |
- v2.ll = ldq(a2);
|
|
|
5544c1 |
+ v2.ll = cpu_ldq_data(env, a2);
|
|
|
5544c1 |
HELPER_LOG("%s: dividing 0x%lx from f%d by 0x%ld\n", __func__,
|
|
|
5544c1 |
v1, f1, v2.d);
|
|
|
5544c1 |
env->fregs[f1].d = float64_div(v1, v2.d, &env->fpu_status);
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
-static void set_round_mode(int m3)
|
|
|
5544c1 |
+static void set_round_mode(CPUS390XState *env, int m3)
|
|
|
5544c1 |
{
|
|
|
5544c1 |
switch (m3) {
|
|
|
5544c1 |
case 0:
|
|
|
5544c1 |
@@ -553,33 +555,36 @@ static void set_round_mode(int m3)
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
/* convert 32-bit float to 64-bit int */
|
|
|
5544c1 |
-uint32_t HELPER(cgebr)(uint32_t r1, uint32_t f2, uint32_t m3)
|
|
|
5544c1 |
+uint32_t HELPER(cgebr)(CPUS390XState *env, uint32_t r1, uint32_t f2,
|
|
|
5544c1 |
+ uint32_t m3)
|
|
|
5544c1 |
{
|
|
|
5544c1 |
float32 v2 = env->fregs[f2].l.upper;
|
|
|
5544c1 |
|
|
|
5544c1 |
- set_round_mode(m3);
|
|
|
5544c1 |
+ set_round_mode(env, m3);
|
|
|
5544c1 |
env->regs[r1] = float32_to_int64(v2, &env->fpu_status);
|
|
|
5544c1 |
return set_cc_nz_f32(v2);
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
/* convert 64-bit float to 64-bit int */
|
|
|
5544c1 |
-uint32_t HELPER(cgdbr)(uint32_t r1, uint32_t f2, uint32_t m3)
|
|
|
5544c1 |
+uint32_t HELPER(cgdbr)(CPUS390XState *env, uint32_t r1, uint32_t f2,
|
|
|
5544c1 |
+ uint32_t m3)
|
|
|
5544c1 |
{
|
|
|
5544c1 |
float64 v2 = env->fregs[f2].d;
|
|
|
5544c1 |
|
|
|
5544c1 |
- set_round_mode(m3);
|
|
|
5544c1 |
+ set_round_mode(env, m3);
|
|
|
5544c1 |
env->regs[r1] = float64_to_int64(v2, &env->fpu_status);
|
|
|
5544c1 |
return set_cc_nz_f64(v2);
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
/* convert 128-bit float to 64-bit int */
|
|
|
5544c1 |
-uint32_t HELPER(cgxbr)(uint32_t r1, uint32_t f2, uint32_t m3)
|
|
|
5544c1 |
+uint32_t HELPER(cgxbr)(CPUS390XState *env, uint32_t r1, uint32_t f2,
|
|
|
5544c1 |
+ uint32_t m3)
|
|
|
5544c1 |
{
|
|
|
5544c1 |
CPU_QuadU v2;
|
|
|
5544c1 |
|
|
|
5544c1 |
v2.ll.upper = env->fregs[f2].ll;
|
|
|
5544c1 |
v2.ll.lower = env->fregs[f2 + 2].ll;
|
|
|
5544c1 |
- set_round_mode(m3);
|
|
|
5544c1 |
+ set_round_mode(env, m3);
|
|
|
5544c1 |
env->regs[r1] = float128_to_int64(v2.q, &env->fpu_status);
|
|
|
5544c1 |
if (float128_is_any_nan(v2.q)) {
|
|
|
5544c1 |
return 3;
|
|
|
5544c1 |
@@ -593,29 +598,32 @@ uint32_t HELPER(cgxbr)(uint32_t r1, uint32_t f2, uint32_t m3)
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
/* convert 32-bit float to 32-bit int */
|
|
|
5544c1 |
-uint32_t HELPER(cfebr)(uint32_t r1, uint32_t f2, uint32_t m3)
|
|
|
5544c1 |
+uint32_t HELPER(cfebr)(CPUS390XState *env, uint32_t r1, uint32_t f2,
|
|
|
5544c1 |
+ uint32_t m3)
|
|
|
5544c1 |
{
|
|
|
5544c1 |
float32 v2 = env->fregs[f2].l.upper;
|
|
|
5544c1 |
|
|
|
5544c1 |
- set_round_mode(m3);
|
|
|
5544c1 |
+ set_round_mode(env, m3);
|
|
|
5544c1 |
env->regs[r1] = (env->regs[r1] & 0xffffffff00000000ULL) |
|
|
|
5544c1 |
float32_to_int32(v2, &env->fpu_status);
|
|
|
5544c1 |
return set_cc_nz_f32(v2);
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
/* convert 64-bit float to 32-bit int */
|
|
|
5544c1 |
-uint32_t HELPER(cfdbr)(uint32_t r1, uint32_t f2, uint32_t m3)
|
|
|
5544c1 |
+uint32_t HELPER(cfdbr)(CPUS390XState *env, uint32_t r1, uint32_t f2,
|
|
|
5544c1 |
+ uint32_t m3)
|
|
|
5544c1 |
{
|
|
|
5544c1 |
float64 v2 = env->fregs[f2].d;
|
|
|
5544c1 |
|
|
|
5544c1 |
- set_round_mode(m3);
|
|
|
5544c1 |
+ set_round_mode(env, m3);
|
|
|
5544c1 |
env->regs[r1] = (env->regs[r1] & 0xffffffff00000000ULL) |
|
|
|
5544c1 |
float64_to_int32(v2, &env->fpu_status);
|
|
|
5544c1 |
return set_cc_nz_f64(v2);
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
/* convert 128-bit float to 32-bit int */
|
|
|
5544c1 |
-uint32_t HELPER(cfxbr)(uint32_t r1, uint32_t f2, uint32_t m3)
|
|
|
5544c1 |
+uint32_t HELPER(cfxbr)(CPUS390XState *env, uint32_t r1, uint32_t f2,
|
|
|
5544c1 |
+ uint32_t m3)
|
|
|
5544c1 |
{
|
|
|
5544c1 |
CPU_QuadU v2;
|
|
|
5544c1 |
|
|
|
5544c1 |
@@ -627,19 +635,19 @@ uint32_t HELPER(cfxbr)(uint32_t r1, uint32_t f2, uint32_t m3)
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
/* load 32-bit FP zero */
|
|
|
5544c1 |
-void HELPER(lzer)(uint32_t f1)
|
|
|
5544c1 |
+void HELPER(lzer)(CPUS390XState *env, uint32_t f1)
|
|
|
5544c1 |
{
|
|
|
5544c1 |
env->fregs[f1].l.upper = float32_zero;
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
/* load 64-bit FP zero */
|
|
|
5544c1 |
-void HELPER(lzdr)(uint32_t f1)
|
|
|
5544c1 |
+void HELPER(lzdr)(CPUS390XState *env, uint32_t f1)
|
|
|
5544c1 |
{
|
|
|
5544c1 |
env->fregs[f1].d = float64_zero;
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
/* load 128-bit FP zero */
|
|
|
5544c1 |
-void HELPER(lzxr)(uint32_t f1)
|
|
|
5544c1 |
+void HELPER(lzxr)(CPUS390XState *env, uint32_t f1)
|
|
|
5544c1 |
{
|
|
|
5544c1 |
CPU_QuadU x;
|
|
|
5544c1 |
|
|
|
5544c1 |
@@ -649,7 +657,7 @@ void HELPER(lzxr)(uint32_t f1)
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
/* 128-bit FP subtraction RR */
|
|
|
5544c1 |
-uint32_t HELPER(sxbr)(uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
+uint32_t HELPER(sxbr)(CPUS390XState *env, uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
{
|
|
|
5544c1 |
CPU_QuadU v1;
|
|
|
5544c1 |
CPU_QuadU v2;
|
|
|
5544c1 |
@@ -666,7 +674,7 @@ uint32_t HELPER(sxbr)(uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
/* 128-bit FP addition RR */
|
|
|
5544c1 |
-uint32_t HELPER(axbr)(uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
+uint32_t HELPER(axbr)(CPUS390XState *env, uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
{
|
|
|
5544c1 |
CPU_QuadU v1;
|
|
|
5544c1 |
CPU_QuadU v2;
|
|
|
5544c1 |
@@ -683,7 +691,7 @@ uint32_t HELPER(axbr)(uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
/* 32-bit FP multiplication RR */
|
|
|
5544c1 |
-void HELPER(meebr)(uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
+void HELPER(meebr)(CPUS390XState *env, uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
{
|
|
|
5544c1 |
env->fregs[f1].l.upper = float32_mul(env->fregs[f1].l.upper,
|
|
|
5544c1 |
env->fregs[f2].l.upper,
|
|
|
5544c1 |
@@ -691,19 +699,19 @@ void HELPER(meebr)(uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
/* 64-bit FP division RR */
|
|
|
5544c1 |
-void HELPER(ddbr)(uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
+void HELPER(ddbr)(CPUS390XState *env, uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
{
|
|
|
5544c1 |
env->fregs[f1].d = float64_div(env->fregs[f1].d, env->fregs[f2].d,
|
|
|
5544c1 |
&env->fpu_status);
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
/* 64-bit FP multiply and add RM */
|
|
|
5544c1 |
-void HELPER(madb)(uint32_t f1, uint64_t a2, uint32_t f3)
|
|
|
5544c1 |
+void HELPER(madb)(CPUS390XState *env, uint32_t f1, uint64_t a2, uint32_t f3)
|
|
|
5544c1 |
{
|
|
|
5544c1 |
CPU_DoubleU v2;
|
|
|
5544c1 |
|
|
|
5544c1 |
HELPER_LOG("%s: f1 %d a2 0x%lx f3 %d\n", __func__, f1, a2, f3);
|
|
|
5544c1 |
- v2.ll = ldq(a2);
|
|
|
5544c1 |
+ v2.ll = cpu_ldq_data(env, a2);
|
|
|
5544c1 |
env->fregs[f1].d = float64_add(env->fregs[f1].d,
|
|
|
5544c1 |
float64_mul(v2.d, env->fregs[f3].d,
|
|
|
5544c1 |
&env->fpu_status),
|
|
|
5544c1 |
@@ -711,7 +719,7 @@ void HELPER(madb)(uint32_t f1, uint64_t a2, uint32_t f3)
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
/* 64-bit FP multiply and add RR */
|
|
|
5544c1 |
-void HELPER(madbr)(uint32_t f1, uint32_t f3, uint32_t f2)
|
|
|
5544c1 |
+void HELPER(madbr)(CPUS390XState *env, uint32_t f1, uint32_t f3, uint32_t f2)
|
|
|
5544c1 |
{
|
|
|
5544c1 |
HELPER_LOG("%s: f1 %d f2 %d f3 %d\n", __func__, f1, f2, f3);
|
|
|
5544c1 |
env->fregs[f1].d = float64_add(float64_mul(env->fregs[f2].d,
|
|
|
5544c1 |
@@ -721,7 +729,7 @@ void HELPER(madbr)(uint32_t f1, uint32_t f3, uint32_t f2)
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
/* 64-bit FP multiply and subtract RR */
|
|
|
5544c1 |
-void HELPER(msdbr)(uint32_t f1, uint32_t f3, uint32_t f2)
|
|
|
5544c1 |
+void HELPER(msdbr)(CPUS390XState *env, uint32_t f1, uint32_t f3, uint32_t f2)
|
|
|
5544c1 |
{
|
|
|
5544c1 |
HELPER_LOG("%s: f1 %d f2 %d f3 %d\n", __func__, f1, f2, f3);
|
|
|
5544c1 |
env->fregs[f1].d = float64_sub(float64_mul(env->fregs[f2].d,
|
|
|
5544c1 |
@@ -731,7 +739,7 @@ void HELPER(msdbr)(uint32_t f1, uint32_t f3, uint32_t f2)
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
/* 32-bit FP multiply and add RR */
|
|
|
5544c1 |
-void HELPER(maebr)(uint32_t f1, uint32_t f3, uint32_t f2)
|
|
|
5544c1 |
+void HELPER(maebr)(CPUS390XState *env, uint32_t f1, uint32_t f3, uint32_t f2)
|
|
|
5544c1 |
{
|
|
|
5544c1 |
env->fregs[f1].l.upper = float32_add(env->fregs[f1].l.upper,
|
|
|
5544c1 |
float32_mul(env->fregs[f2].l.upper,
|
|
|
5544c1 |
@@ -741,29 +749,29 @@ void HELPER(maebr)(uint32_t f1, uint32_t f3, uint32_t f2)
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
/* convert 32-bit float to 64-bit float */
|
|
|
5544c1 |
-void HELPER(ldeb)(uint32_t f1, uint64_t a2)
|
|
|
5544c1 |
+void HELPER(ldeb)(CPUS390XState *env, uint32_t f1, uint64_t a2)
|
|
|
5544c1 |
{
|
|
|
5544c1 |
uint32_t v2;
|
|
|
5544c1 |
|
|
|
5544c1 |
- v2 = ldl(a2);
|
|
|
5544c1 |
+ v2 = cpu_ldl_data(env, a2);
|
|
|
5544c1 |
env->fregs[f1].d = float32_to_float64(v2,
|
|
|
5544c1 |
&env->fpu_status);
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
/* convert 64-bit float to 128-bit float */
|
|
|
5544c1 |
-void HELPER(lxdb)(uint32_t f1, uint64_t a2)
|
|
|
5544c1 |
+void HELPER(lxdb)(CPUS390XState *env, uint32_t f1, uint64_t a2)
|
|
|
5544c1 |
{
|
|
|
5544c1 |
CPU_DoubleU v2;
|
|
|
5544c1 |
CPU_QuadU v1;
|
|
|
5544c1 |
|
|
|
5544c1 |
- v2.ll = ldq(a2);
|
|
|
5544c1 |
+ v2.ll = cpu_ldq_data(env, a2);
|
|
|
5544c1 |
v1.q = float64_to_float128(v2.d, &env->fpu_status);
|
|
|
5544c1 |
env->fregs[f1].ll = v1.ll.upper;
|
|
|
5544c1 |
env->fregs[f1 + 2].ll = v1.ll.lower;
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
/* test data class 32-bit */
|
|
|
5544c1 |
-uint32_t HELPER(tceb)(uint32_t f1, uint64_t m2)
|
|
|
5544c1 |
+uint32_t HELPER(tceb)(CPUS390XState *env, uint32_t f1, uint64_t m2)
|
|
|
5544c1 |
{
|
|
|
5544c1 |
float32 v1 = env->fregs[f1].l.upper;
|
|
|
5544c1 |
int neg = float32_is_neg(v1);
|
|
|
5544c1 |
@@ -785,7 +793,7 @@ uint32_t HELPER(tceb)(uint32_t f1, uint64_t m2)
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
/* test data class 64-bit */
|
|
|
5544c1 |
-uint32_t HELPER(tcdb)(uint32_t f1, uint64_t m2)
|
|
|
5544c1 |
+uint32_t HELPER(tcdb)(CPUS390XState *env, uint32_t f1, uint64_t m2)
|
|
|
5544c1 |
{
|
|
|
5544c1 |
float64 v1 = env->fregs[f1].d;
|
|
|
5544c1 |
int neg = float64_is_neg(v1);
|
|
|
5544c1 |
@@ -806,7 +814,7 @@ uint32_t HELPER(tcdb)(uint32_t f1, uint64_t m2)
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
/* test data class 128-bit */
|
|
|
5544c1 |
-uint32_t HELPER(tcxb)(uint32_t f1, uint64_t m2)
|
|
|
5544c1 |
+uint32_t HELPER(tcxb)(CPUS390XState *env, uint32_t f1, uint64_t m2)
|
|
|
5544c1 |
{
|
|
|
5544c1 |
CPU_QuadU v1;
|
|
|
5544c1 |
uint32_t cc = 0;
|
|
|
5544c1 |
@@ -830,7 +838,7 @@ uint32_t HELPER(tcxb)(uint32_t f1, uint64_t m2)
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
/* square root 64-bit RR */
|
|
|
5544c1 |
-void HELPER(sqdbr)(uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
+void HELPER(sqdbr)(CPUS390XState *env, uint32_t f1, uint32_t f2)
|
|
|
5544c1 |
{
|
|
|
5544c1 |
env->fregs[f1].d = float64_sqrt(env->fregs[f2].d, &env->fpu_status);
|
|
|
5544c1 |
}
|
|
|
5544c1 |
diff --git a/target-s390x/helper.h b/target-s390x/helper.h
|
|
|
5544c1 |
index 01c8d0e..af98773 100644
|
|
|
5544c1 |
--- a/target-s390x/helper.h
|
|
|
5544c1 |
+++ b/target-s390x/helper.h
|
|
|
5544c1 |
@@ -45,70 +45,70 @@ DEF_HELPER_3(mvcle, i32, i32, i64, i32)
|
|
|
5544c1 |
DEF_HELPER_3(clcle, i32, i32, i64, i32)
|
|
|
5544c1 |
DEF_HELPER_3(slb, i32, i32, i32, i32)
|
|
|
5544c1 |
DEF_HELPER_4(slbg, i32, i32, i32, i64, i64)
|
|
|
5544c1 |
-DEF_HELPER_2(cefbr, void, i32, s32)
|
|
|
5544c1 |
-DEF_HELPER_2(cdfbr, void, i32, s32)
|
|
|
5544c1 |
-DEF_HELPER_2(cxfbr, void, i32, s32)
|
|
|
5544c1 |
-DEF_HELPER_2(cegbr, void, i32, s64)
|
|
|
5544c1 |
-DEF_HELPER_2(cdgbr, void, i32, s64)
|
|
|
5544c1 |
-DEF_HELPER_2(cxgbr, void, i32, s64)
|
|
|
5544c1 |
-DEF_HELPER_2(adbr, i32, i32, i32)
|
|
|
5544c1 |
-DEF_HELPER_2(aebr, i32, i32, i32)
|
|
|
5544c1 |
-DEF_HELPER_2(sebr, i32, i32, i32)
|
|
|
5544c1 |
-DEF_HELPER_2(sdbr, i32, i32, i32)
|
|
|
5544c1 |
-DEF_HELPER_2(debr, void, i32, i32)
|
|
|
5544c1 |
-DEF_HELPER_2(dxbr, void, i32, i32)
|
|
|
5544c1 |
-DEF_HELPER_2(mdbr, void, i32, i32)
|
|
|
5544c1 |
-DEF_HELPER_2(mxbr, void, i32, i32)
|
|
|
5544c1 |
-DEF_HELPER_2(ldebr, void, i32, i32)
|
|
|
5544c1 |
-DEF_HELPER_2(ldxbr, void, i32, i32)
|
|
|
5544c1 |
-DEF_HELPER_2(lxdbr, void, i32, i32)
|
|
|
5544c1 |
-DEF_HELPER_2(ledbr, void, i32, i32)
|
|
|
5544c1 |
-DEF_HELPER_2(lexbr, void, i32, i32)
|
|
|
5544c1 |
-DEF_HELPER_2(lpebr, i32, i32, i32)
|
|
|
5544c1 |
-DEF_HELPER_2(lpdbr, i32, i32, i32)
|
|
|
5544c1 |
-DEF_HELPER_2(lpxbr, i32, i32, i32)
|
|
|
5544c1 |
-DEF_HELPER_2(ltebr, i32, i32, i32)
|
|
|
5544c1 |
-DEF_HELPER_2(ltdbr, i32, i32, i32)
|
|
|
5544c1 |
-DEF_HELPER_2(ltxbr, i32, i32, i32)
|
|
|
5544c1 |
-DEF_HELPER_2(lcebr, i32, i32, i32)
|
|
|
5544c1 |
-DEF_HELPER_2(lcdbr, i32, i32, i32)
|
|
|
5544c1 |
-DEF_HELPER_2(lcxbr, i32, i32, i32)
|
|
|
5544c1 |
-DEF_HELPER_2(aeb, void, i32, i32)
|
|
|
5544c1 |
-DEF_HELPER_2(deb, void, i32, i32)
|
|
|
5544c1 |
-DEF_HELPER_2(meeb, void, i32, i32)
|
|
|
5544c1 |
-DEF_HELPER_2(cdb, i32, i32, i64)
|
|
|
5544c1 |
-DEF_HELPER_2(adb, i32, i32, i64)
|
|
|
5544c1 |
-DEF_HELPER_2(seb, void, i32, i32)
|
|
|
5544c1 |
-DEF_HELPER_2(sdb, i32, i32, i64)
|
|
|
5544c1 |
-DEF_HELPER_2(mdb, void, i32, i64)
|
|
|
5544c1 |
-DEF_HELPER_2(ddb, void, i32, i64)
|
|
|
5544c1 |
-DEF_HELPER_FLAGS_2(cebr, TCG_CALL_PURE, i32, i32, i32)
|
|
|
5544c1 |
-DEF_HELPER_FLAGS_2(cdbr, TCG_CALL_PURE, i32, i32, i32)
|
|
|
5544c1 |
-DEF_HELPER_FLAGS_2(cxbr, TCG_CALL_PURE, i32, i32, i32)
|
|
|
5544c1 |
-DEF_HELPER_3(cgebr, i32, i32, i32, i32)
|
|
|
5544c1 |
-DEF_HELPER_3(cgdbr, i32, i32, i32, i32)
|
|
|
5544c1 |
-DEF_HELPER_3(cgxbr, i32, i32, i32, i32)
|
|
|
5544c1 |
-DEF_HELPER_1(lzer, void, i32)
|
|
|
5544c1 |
-DEF_HELPER_1(lzdr, void, i32)
|
|
|
5544c1 |
-DEF_HELPER_1(lzxr, void, i32)
|
|
|
5544c1 |
-DEF_HELPER_3(cfebr, i32, i32, i32, i32)
|
|
|
5544c1 |
-DEF_HELPER_3(cfdbr, i32, i32, i32, i32)
|
|
|
5544c1 |
-DEF_HELPER_3(cfxbr, i32, i32, i32, i32)
|
|
|
5544c1 |
-DEF_HELPER_2(axbr, i32, i32, i32)
|
|
|
5544c1 |
-DEF_HELPER_2(sxbr, i32, i32, i32)
|
|
|
5544c1 |
-DEF_HELPER_2(meebr, void, i32, i32)
|
|
|
5544c1 |
-DEF_HELPER_2(ddbr, void, i32, i32)
|
|
|
5544c1 |
-DEF_HELPER_3(madb, void, i32, i64, i32)
|
|
|
5544c1 |
-DEF_HELPER_3(maebr, void, i32, i32, i32)
|
|
|
5544c1 |
-DEF_HELPER_3(madbr, void, i32, i32, i32)
|
|
|
5544c1 |
-DEF_HELPER_3(msdbr, void, i32, i32, i32)
|
|
|
5544c1 |
-DEF_HELPER_2(ldeb, void, i32, i64)
|
|
|
5544c1 |
-DEF_HELPER_2(lxdb, void, i32, i64)
|
|
|
5544c1 |
-DEF_HELPER_FLAGS_2(tceb, TCG_CALL_PURE, i32, i32, i64)
|
|
|
5544c1 |
-DEF_HELPER_FLAGS_2(tcdb, TCG_CALL_PURE, i32, i32, i64)
|
|
|
5544c1 |
-DEF_HELPER_FLAGS_2(tcxb, TCG_CALL_PURE, i32, i32, i64)
|
|
|
5544c1 |
+DEF_HELPER_3(cefbr, void, env, i32, s32)
|
|
|
5544c1 |
+DEF_HELPER_3(cdfbr, void, env, i32, s32)
|
|
|
5544c1 |
+DEF_HELPER_3(cxfbr, void, env, i32, s32)
|
|
|
5544c1 |
+DEF_HELPER_3(cegbr, void, env, i32, s64)
|
|
|
5544c1 |
+DEF_HELPER_3(cdgbr, void, env, i32, s64)
|
|
|
5544c1 |
+DEF_HELPER_3(cxgbr, void, env, i32, s64)
|
|
|
5544c1 |
+DEF_HELPER_3(adbr, i32, env, i32, i32)
|
|
|
5544c1 |
+DEF_HELPER_3(aebr, i32, env, i32, i32)
|
|
|
5544c1 |
+DEF_HELPER_3(sebr, i32, env, i32, i32)
|
|
|
5544c1 |
+DEF_HELPER_3(sdbr, i32, env, i32, i32)
|
|
|
5544c1 |
+DEF_HELPER_3(debr, void, env, i32, i32)
|
|
|
5544c1 |
+DEF_HELPER_3(dxbr, void, env, i32, i32)
|
|
|
5544c1 |
+DEF_HELPER_3(mdbr, void, env, i32, i32)
|
|
|
5544c1 |
+DEF_HELPER_3(mxbr, void, env, i32, i32)
|
|
|
5544c1 |
+DEF_HELPER_3(ldebr, void, env, i32, i32)
|
|
|
5544c1 |
+DEF_HELPER_3(ldxbr, void, env, i32, i32)
|
|
|
5544c1 |
+DEF_HELPER_3(lxdbr, void, env, i32, i32)
|
|
|
5544c1 |
+DEF_HELPER_3(ledbr, void, env, i32, i32)
|
|
|
5544c1 |
+DEF_HELPER_3(lexbr, void, env, i32, i32)
|
|
|
5544c1 |
+DEF_HELPER_3(lpebr, i32, env, i32, i32)
|
|
|
5544c1 |
+DEF_HELPER_3(lpdbr, i32, env, i32, i32)
|
|
|
5544c1 |
+DEF_HELPER_3(lpxbr, i32, env, i32, i32)
|
|
|
5544c1 |
+DEF_HELPER_3(ltebr, i32, env, i32, i32)
|
|
|
5544c1 |
+DEF_HELPER_3(ltdbr, i32, env, i32, i32)
|
|
|
5544c1 |
+DEF_HELPER_3(ltxbr, i32, env, i32, i32)
|
|
|
5544c1 |
+DEF_HELPER_3(lcebr, i32, env, i32, i32)
|
|
|
5544c1 |
+DEF_HELPER_3(lcdbr, i32, env, i32, i32)
|
|
|
5544c1 |
+DEF_HELPER_3(lcxbr, i32, env, i32, i32)
|
|
|
5544c1 |
+DEF_HELPER_3(aeb, void, env, i32, i32)
|
|
|
5544c1 |
+DEF_HELPER_3(deb, void, env, i32, i32)
|
|
|
5544c1 |
+DEF_HELPER_3(meeb, void, env, i32, i32)
|
|
|
5544c1 |
+DEF_HELPER_3(cdb, i32, env, i32, i64)
|
|
|
5544c1 |
+DEF_HELPER_3(adb, i32, env, i32, i64)
|
|
|
5544c1 |
+DEF_HELPER_3(seb, void, env, i32, i32)
|
|
|
5544c1 |
+DEF_HELPER_3(sdb, i32, env, i32, i64)
|
|
|
5544c1 |
+DEF_HELPER_3(mdb, void, env, i32, i64)
|
|
|
5544c1 |
+DEF_HELPER_3(ddb, void, env, i32, i64)
|
|
|
5544c1 |
+DEF_HELPER_FLAGS_3(cebr, TCG_CALL_PURE, i32, env, i32, i32)
|
|
|
5544c1 |
+DEF_HELPER_FLAGS_3(cdbr, TCG_CALL_PURE, i32, env, i32, i32)
|
|
|
5544c1 |
+DEF_HELPER_FLAGS_3(cxbr, TCG_CALL_PURE, i32, env, i32, i32)
|
|
|
5544c1 |
+DEF_HELPER_4(cgebr, i32, env, i32, i32, i32)
|
|
|
5544c1 |
+DEF_HELPER_4(cgdbr, i32, env, i32, i32, i32)
|
|
|
5544c1 |
+DEF_HELPER_4(cgxbr, i32, env, i32, i32, i32)
|
|
|
5544c1 |
+DEF_HELPER_2(lzer, void, env, i32)
|
|
|
5544c1 |
+DEF_HELPER_2(lzdr, void, env, i32)
|
|
|
5544c1 |
+DEF_HELPER_2(lzxr, void, env, i32)
|
|
|
5544c1 |
+DEF_HELPER_4(cfebr, i32, env, i32, i32, i32)
|
|
|
5544c1 |
+DEF_HELPER_4(cfdbr, i32, env, i32, i32, i32)
|
|
|
5544c1 |
+DEF_HELPER_4(cfxbr, i32, env, i32, i32, i32)
|
|
|
5544c1 |
+DEF_HELPER_3(axbr, i32, env, i32, i32)
|
|
|
5544c1 |
+DEF_HELPER_3(sxbr, i32, env, i32, i32)
|
|
|
5544c1 |
+DEF_HELPER_3(meebr, void, env, i32, i32)
|
|
|
5544c1 |
+DEF_HELPER_3(ddbr, void, env, i32, i32)
|
|
|
5544c1 |
+DEF_HELPER_4(madb, void, env, i32, i64, i32)
|
|
|
5544c1 |
+DEF_HELPER_4(maebr, void, env, i32, i32, i32)
|
|
|
5544c1 |
+DEF_HELPER_4(madbr, void, env, i32, i32, i32)
|
|
|
5544c1 |
+DEF_HELPER_4(msdbr, void, env, i32, i32, i32)
|
|
|
5544c1 |
+DEF_HELPER_3(ldeb, void, env, i32, i64)
|
|
|
5544c1 |
+DEF_HELPER_3(lxdb, void, env, i32, i64)
|
|
|
5544c1 |
+DEF_HELPER_FLAGS_3(tceb, TCG_CALL_PURE, i32, env, i32, i64)
|
|
|
5544c1 |
+DEF_HELPER_FLAGS_3(tcdb, TCG_CALL_PURE, i32, env, i32, i64)
|
|
|
5544c1 |
+DEF_HELPER_FLAGS_3(tcxb, TCG_CALL_PURE, i32, env, i32, i64)
|
|
|
5544c1 |
DEF_HELPER_2(flogr, i32, i32, i64)
|
|
|
5544c1 |
-DEF_HELPER_2(sqdbr, void, i32, i32)
|
|
|
5544c1 |
+DEF_HELPER_3(sqdbr, void, env, i32, i32)
|
|
|
5544c1 |
DEF_HELPER_FLAGS_1(cvd, TCG_CALL_PURE|TCG_CALL_CONST, i64, s32)
|
|
|
5544c1 |
DEF_HELPER_3(unpk, void, i32, i64, i64)
|
|
|
5544c1 |
DEF_HELPER_3(tr, void, i32, i64, i64)
|
|
|
5544c1 |
diff --git a/target-s390x/mem_helper.c b/target-s390x/mem_helper.c
|
|
|
5544c1 |
index ba05e65..3f8b3ba 100644
|
|
|
5544c1 |
--- a/target-s390x/mem_helper.c
|
|
|
5544c1 |
+++ b/target-s390x/mem_helper.c
|
|
|
5544c1 |
@@ -1188,3 +1188,52 @@ uint32_t HELPER(lra)(uint64_t addr, uint32_t r1)
|
|
|
5544c1 |
}
|
|
|
5544c1 |
|
|
|
5544c1 |
#endif
|
|
|
5544c1 |
+
|
|
|
5544c1 |
+/* temporary wrappers */
|
|
|
5544c1 |
+#if defined(CONFIG_USER_ONLY)
|
|
|
5544c1 |
+#define ldub_data(addr) ldub_raw(addr)
|
|
|
5544c1 |
+#define lduw_data(addr) lduw_raw(addr)
|
|
|
5544c1 |
+#define ldl_data(addr) ldl_raw(addr)
|
|
|
5544c1 |
+#define ldq_data(addr) ldq_raw(addr)
|
|
|
5544c1 |
+
|
|
|
5544c1 |
+#define stb_data(addr, data) stb_raw(addr, data)
|
|
|
5544c1 |
+#define stw_data(addr, data) stw_raw(addr, data)
|
|
|
5544c1 |
+#define stl_data(addr, data) stl_raw(addr, data)
|
|
|
5544c1 |
+#define stq_data(addr, data) stq_raw(addr, data)
|
|
|
5544c1 |
+#endif
|
|
|
5544c1 |
+
|
|
|
5544c1 |
+#define WRAP_LD(rettype, fn) \
|
|
|
5544c1 |
+ rettype cpu_ ## fn(CPUS390XState *env1, target_ulong addr) \
|
|
|
5544c1 |
+ { \
|
|
|
5544c1 |
+ CPUS390XState *saved_env; \
|
|
|
5544c1 |
+ rettype ret; \
|
|
|
5544c1 |
+ \
|
|
|
5544c1 |
+ saved_env = env; \
|
|
|
5544c1 |
+ env = env1; \
|
|
|
5544c1 |
+ ret = fn(addr); \
|
|
|
5544c1 |
+ env = saved_env; \
|
|
|
5544c1 |
+ return ret; \
|
|
|
5544c1 |
+ }
|
|
|
5544c1 |
+
|
|
|
5544c1 |
+WRAP_LD(uint32_t, ldub_data)
|
|
|
5544c1 |
+WRAP_LD(uint32_t, lduw_data)
|
|
|
5544c1 |
+WRAP_LD(uint32_t, ldl_data)
|
|
|
5544c1 |
+WRAP_LD(uint64_t, ldq_data)
|
|
|
5544c1 |
+#undef WRAP_LD
|
|
|
5544c1 |
+
|
|
|
5544c1 |
+#define WRAP_ST(datatype, fn) \
|
|
|
5544c1 |
+ void cpu_ ## fn(CPUS390XState *env1, target_ulong addr, datatype val) \
|
|
|
5544c1 |
+ { \
|
|
|
5544c1 |
+ CPUS390XState *saved_env; \
|
|
|
5544c1 |
+ \
|
|
|
5544c1 |
+ saved_env = env; \
|
|
|
5544c1 |
+ env = env1; \
|
|
|
5544c1 |
+ fn(addr, val); \
|
|
|
5544c1 |
+ env = saved_env; \
|
|
|
5544c1 |
+ }
|
|
|
5544c1 |
+
|
|
|
5544c1 |
+WRAP_ST(uint32_t, stb_data)
|
|
|
5544c1 |
+WRAP_ST(uint32_t, stw_data)
|
|
|
5544c1 |
+WRAP_ST(uint32_t, stl_data)
|
|
|
5544c1 |
+WRAP_ST(uint64_t, stq_data)
|
|
|
5544c1 |
+#undef WRAP_ST
|
|
|
5544c1 |
diff --git a/target-s390x/translate.c b/target-s390x/translate.c
|
|
|
5544c1 |
index c370df3..b1f2071 100644
|
|
|
5544c1 |
--- a/target-s390x/translate.c
|
|
|
5544c1 |
+++ b/target-s390x/translate.c
|
|
|
5544c1 |
@@ -2206,11 +2206,11 @@ static void disas_ed(DisasContext *s, int op, int r1, int x2, int b2, int d2,
|
|
|
5544c1 |
switch (op) {
|
|
|
5544c1 |
case 0x4: /* LDEB R1,D2(X2,B2) [RXE] */
|
|
|
5544c1 |
potential_page_fault(s);
|
|
|
5544c1 |
- gen_helper_ldeb(tmp_r1, addr);
|
|
|
5544c1 |
+ gen_helper_ldeb(cpu_env, tmp_r1, addr);
|
|
|
5544c1 |
break;
|
|
|
5544c1 |
case 0x5: /* LXDB R1,D2(X2,B2) [RXE] */
|
|
|
5544c1 |
potential_page_fault(s);
|
|
|
5544c1 |
- gen_helper_lxdb(tmp_r1, addr);
|
|
|
5544c1 |
+ gen_helper_lxdb(cpu_env, tmp_r1, addr);
|
|
|
5544c1 |
break;
|
|
|
5544c1 |
case 0x9: /* CEB R1,D2(X2,B2) [RXE] */
|
|
|
5544c1 |
tmp = tcg_temp_new_i64();
|
|
|
5544c1 |
@@ -2225,7 +2225,7 @@ static void disas_ed(DisasContext *s, int op, int r1, int x2, int b2, int d2,
|
|
|
5544c1 |
tmp32 = tcg_temp_new_i32();
|
|
|
5544c1 |
tcg_gen_qemu_ld32u(tmp, addr, get_mem_index(s));
|
|
|
5544c1 |
tcg_gen_trunc_i64_i32(tmp32, tmp);
|
|
|
5544c1 |
- gen_helper_aeb(tmp_r1, tmp32);
|
|
|
5544c1 |
+ gen_helper_aeb(cpu_env, tmp_r1, tmp32);
|
|
|
5544c1 |
tcg_temp_free_i64(tmp);
|
|
|
5544c1 |
tcg_temp_free_i32(tmp32);
|
|
|
5544c1 |
|
|
|
5544c1 |
@@ -2238,7 +2238,7 @@ static void disas_ed(DisasContext *s, int op, int r1, int x2, int b2, int d2,
|
|
|
5544c1 |
tmp32 = tcg_temp_new_i32();
|
|
|
5544c1 |
tcg_gen_qemu_ld32u(tmp, addr, get_mem_index(s));
|
|
|
5544c1 |
tcg_gen_trunc_i64_i32(tmp32, tmp);
|
|
|
5544c1 |
- gen_helper_seb(tmp_r1, tmp32);
|
|
|
5544c1 |
+ gen_helper_seb(cpu_env, tmp_r1, tmp32);
|
|
|
5544c1 |
tcg_temp_free_i64(tmp);
|
|
|
5544c1 |
tcg_temp_free_i32(tmp32);
|
|
|
5544c1 |
|
|
|
5544c1 |
@@ -2251,23 +2251,23 @@ static void disas_ed(DisasContext *s, int op, int r1, int x2, int b2, int d2,
|
|
|
5544c1 |
tmp32 = tcg_temp_new_i32();
|
|
|
5544c1 |
tcg_gen_qemu_ld32u(tmp, addr, get_mem_index(s));
|
|
|
5544c1 |
tcg_gen_trunc_i64_i32(tmp32, tmp);
|
|
|
5544c1 |
- gen_helper_deb(tmp_r1, tmp32);
|
|
|
5544c1 |
+ gen_helper_deb(cpu_env, tmp_r1, tmp32);
|
|
|
5544c1 |
tcg_temp_free_i64(tmp);
|
|
|
5544c1 |
tcg_temp_free_i32(tmp32);
|
|
|
5544c1 |
break;
|
|
|
5544c1 |
case 0x10: /* TCEB R1,D2(X2,B2) [RXE] */
|
|
|
5544c1 |
potential_page_fault(s);
|
|
|
5544c1 |
- gen_helper_tceb(cc_op, tmp_r1, addr);
|
|
|
5544c1 |
+ gen_helper_tceb(cc_op, cpu_env, tmp_r1, addr);
|
|
|
5544c1 |
set_cc_static(s);
|
|
|
5544c1 |
break;
|
|
|
5544c1 |
case 0x11: /* TCDB R1,D2(X2,B2) [RXE] */
|
|
|
5544c1 |
potential_page_fault(s);
|
|
|
5544c1 |
- gen_helper_tcdb(cc_op, tmp_r1, addr);
|
|
|
5544c1 |
+ gen_helper_tcdb(cc_op, cpu_env, tmp_r1, addr);
|
|
|
5544c1 |
set_cc_static(s);
|
|
|
5544c1 |
break;
|
|
|
5544c1 |
case 0x12: /* TCXB R1,D2(X2,B2) [RXE] */
|
|
|
5544c1 |
potential_page_fault(s);
|
|
|
5544c1 |
- gen_helper_tcxb(cc_op, tmp_r1, addr);
|
|
|
5544c1 |
+ gen_helper_tcxb(cc_op, cpu_env, tmp_r1, addr);
|
|
|
5544c1 |
set_cc_static(s);
|
|
|
5544c1 |
break;
|
|
|
5544c1 |
case 0x17: /* MEEB R1,D2(X2,B2) [RXE] */
|
|
|
5544c1 |
@@ -2275,38 +2275,38 @@ static void disas_ed(DisasContext *s, int op, int r1, int x2, int b2, int d2,
|
|
|
5544c1 |
tmp32 = tcg_temp_new_i32();
|
|
|
5544c1 |
tcg_gen_qemu_ld32u(tmp, addr, get_mem_index(s));
|
|
|
5544c1 |
tcg_gen_trunc_i64_i32(tmp32, tmp);
|
|
|
5544c1 |
- gen_helper_meeb(tmp_r1, tmp32);
|
|
|
5544c1 |
+ gen_helper_meeb(cpu_env, tmp_r1, tmp32);
|
|
|
5544c1 |
tcg_temp_free_i64(tmp);
|
|
|
5544c1 |
tcg_temp_free_i32(tmp32);
|
|
|
5544c1 |
break;
|
|
|
5544c1 |
case 0x19: /* CDB R1,D2(X2,B2) [RXE] */
|
|
|
5544c1 |
potential_page_fault(s);
|
|
|
5544c1 |
- gen_helper_cdb(cc_op, tmp_r1, addr);
|
|
|
5544c1 |
+ gen_helper_cdb(cc_op, cpu_env, tmp_r1, addr);
|
|
|
5544c1 |
set_cc_static(s);
|
|
|
5544c1 |
break;
|
|
|
5544c1 |
case 0x1a: /* ADB R1,D2(X2,B2) [RXE] */
|
|
|
5544c1 |
potential_page_fault(s);
|
|
|
5544c1 |
- gen_helper_adb(cc_op, tmp_r1, addr);
|
|
|
5544c1 |
+ gen_helper_adb(cc_op, cpu_env, tmp_r1, addr);
|
|
|
5544c1 |
set_cc_static(s);
|
|
|
5544c1 |
break;
|
|
|
5544c1 |
case 0x1b: /* SDB R1,D2(X2,B2) [RXE] */
|
|
|
5544c1 |
potential_page_fault(s);
|
|
|
5544c1 |
- gen_helper_sdb(cc_op, tmp_r1, addr);
|
|
|
5544c1 |
+ gen_helper_sdb(cc_op, cpu_env, tmp_r1, addr);
|
|
|
5544c1 |
set_cc_static(s);
|
|
|
5544c1 |
break;
|
|
|
5544c1 |
case 0x1c: /* MDB R1,D2(X2,B2) [RXE] */
|
|
|
5544c1 |
potential_page_fault(s);
|
|
|
5544c1 |
- gen_helper_mdb(tmp_r1, addr);
|
|
|
5544c1 |
+ gen_helper_mdb(cpu_env, tmp_r1, addr);
|
|
|
5544c1 |
break;
|
|
|
5544c1 |
case 0x1d: /* DDB R1,D2(X2,B2) [RXE] */
|
|
|
5544c1 |
potential_page_fault(s);
|
|
|
5544c1 |
- gen_helper_ddb(tmp_r1, addr);
|
|
|
5544c1 |
+ gen_helper_ddb(cpu_env, tmp_r1, addr);
|
|
|
5544c1 |
break;
|
|
|
5544c1 |
case 0x1e: /* MADB R1,R3,D2(X2,B2) [RXF] */
|
|
|
5544c1 |
/* for RXF insns, r1 is R3 and r1b is R1 */
|
|
|
5544c1 |
tmp32 = tcg_const_i32(r1b);
|
|
|
5544c1 |
potential_page_fault(s);
|
|
|
5544c1 |
- gen_helper_madb(tmp32, addr, tmp_r1);
|
|
|
5544c1 |
+ gen_helper_madb(cpu_env, tmp32, addr, tmp_r1);
|
|
|
5544c1 |
tcg_temp_free_i32(tmp32);
|
|
|
5544c1 |
break;
|
|
|
5544c1 |
default:
|
|
|
5544c1 |
@@ -3001,14 +3001,14 @@ static void disas_b3(DisasContext *s, int op, int m3, int r1, int r2)
|
|
|
5544c1 |
#define FP_HELPER(i) \
|
|
|
5544c1 |
tmp32_1 = tcg_const_i32(r1); \
|
|
|
5544c1 |
tmp32_2 = tcg_const_i32(r2); \
|
|
|
5544c1 |
- gen_helper_ ## i (tmp32_1, tmp32_2); \
|
|
|
5544c1 |
+ gen_helper_ ## i(cpu_env, tmp32_1, tmp32_2); \
|
|
|
5544c1 |
tcg_temp_free_i32(tmp32_1); \
|
|
|
5544c1 |
tcg_temp_free_i32(tmp32_2);
|
|
|
5544c1 |
|
|
|
5544c1 |
#define FP_HELPER_CC(i) \
|
|
|
5544c1 |
tmp32_1 = tcg_const_i32(r1); \
|
|
|
5544c1 |
tmp32_2 = tcg_const_i32(r2); \
|
|
|
5544c1 |
- gen_helper_ ## i (cc_op, tmp32_1, tmp32_2); \
|
|
|
5544c1 |
+ gen_helper_ ## i(cc_op, cpu_env, tmp32_1, tmp32_2); \
|
|
|
5544c1 |
set_cc_static(s); \
|
|
|
5544c1 |
tcg_temp_free_i32(tmp32_1); \
|
|
|
5544c1 |
tcg_temp_free_i32(tmp32_2);
|
|
|
5544c1 |
@@ -3080,13 +3080,13 @@ static void disas_b3(DisasContext *s, int op, int m3, int r1, int r2)
|
|
|
5544c1 |
tmp32_3 = tcg_const_i32(r1);
|
|
|
5544c1 |
switch (op) {
|
|
|
5544c1 |
case 0xe:
|
|
|
5544c1 |
- gen_helper_maebr(tmp32_1, tmp32_3, tmp32_2);
|
|
|
5544c1 |
+ gen_helper_maebr(cpu_env, tmp32_1, tmp32_3, tmp32_2);
|
|
|
5544c1 |
break;
|
|
|
5544c1 |
case 0x1e:
|
|
|
5544c1 |
- gen_helper_madbr(tmp32_1, tmp32_3, tmp32_2);
|
|
|
5544c1 |
+ gen_helper_madbr(cpu_env, tmp32_1, tmp32_3, tmp32_2);
|
|
|
5544c1 |
break;
|
|
|
5544c1 |
case 0x1f:
|
|
|
5544c1 |
- gen_helper_msdbr(tmp32_1, tmp32_3, tmp32_2);
|
|
|
5544c1 |
+ gen_helper_msdbr(cpu_env, tmp32_1, tmp32_3, tmp32_2);
|
|
|
5544c1 |
break;
|
|
|
5544c1 |
default:
|
|
|
5544c1 |
tcg_abort();
|
|
|
5544c1 |
@@ -3138,17 +3138,17 @@ static void disas_b3(DisasContext *s, int op, int m3, int r1, int r2)
|
|
|
5544c1 |
break;
|
|
|
5544c1 |
case 0x74: /* LZER R1 [RRE] */
|
|
|
5544c1 |
tmp32_1 = tcg_const_i32(r1);
|
|
|
5544c1 |
- gen_helper_lzer(tmp32_1);
|
|
|
5544c1 |
+ gen_helper_lzer(cpu_env, tmp32_1);
|
|
|
5544c1 |
tcg_temp_free_i32(tmp32_1);
|
|
|
5544c1 |
break;
|
|
|
5544c1 |
case 0x75: /* LZDR R1 [RRE] */
|
|
|
5544c1 |
tmp32_1 = tcg_const_i32(r1);
|
|
|
5544c1 |
- gen_helper_lzdr(tmp32_1);
|
|
|
5544c1 |
+ gen_helper_lzdr(cpu_env, tmp32_1);
|
|
|
5544c1 |
tcg_temp_free_i32(tmp32_1);
|
|
|
5544c1 |
break;
|
|
|
5544c1 |
case 0x76: /* LZXR R1 [RRE] */
|
|
|
5544c1 |
tmp32_1 = tcg_const_i32(r1);
|
|
|
5544c1 |
- gen_helper_lzxr(tmp32_1);
|
|
|
5544c1 |
+ gen_helper_lzxr(cpu_env, tmp32_1);
|
|
|
5544c1 |
tcg_temp_free_i32(tmp32_1);
|
|
|
5544c1 |
break;
|
|
|
5544c1 |
case 0x84: /* SFPC R1 [RRE] */
|
|
|
5544c1 |
@@ -3169,13 +3169,13 @@ static void disas_b3(DisasContext *s, int op, int m3, int r1, int r2)
|
|
|
5544c1 |
tmp32_2 = load_reg32(r2);
|
|
|
5544c1 |
switch (op) {
|
|
|
5544c1 |
case 0x94:
|
|
|
5544c1 |
- gen_helper_cefbr(tmp32_1, tmp32_2);
|
|
|
5544c1 |
+ gen_helper_cefbr(cpu_env, tmp32_1, tmp32_2);
|
|
|
5544c1 |
break;
|
|
|
5544c1 |
case 0x95:
|
|
|
5544c1 |
- gen_helper_cdfbr(tmp32_1, tmp32_2);
|
|
|
5544c1 |
+ gen_helper_cdfbr(cpu_env, tmp32_1, tmp32_2);
|
|
|
5544c1 |
break;
|
|
|
5544c1 |
case 0x96:
|
|
|
5544c1 |
- gen_helper_cxfbr(tmp32_1, tmp32_2);
|
|
|
5544c1 |
+ gen_helper_cxfbr(cpu_env, tmp32_1, tmp32_2);
|
|
|
5544c1 |
break;
|
|
|
5544c1 |
default:
|
|
|
5544c1 |
tcg_abort();
|
|
|
5544c1 |
@@ -3191,13 +3191,13 @@ static void disas_b3(DisasContext *s, int op, int m3, int r1, int r2)
|
|
|
5544c1 |
tmp32_3 = tcg_const_i32(m3);
|
|
|
5544c1 |
switch (op) {
|
|
|
5544c1 |
case 0x98:
|
|
|
5544c1 |
- gen_helper_cfebr(cc_op, tmp32_1, tmp32_2, tmp32_3);
|
|
|
5544c1 |
+ gen_helper_cfebr(cc_op, cpu_env, tmp32_1, tmp32_2, tmp32_3);
|
|
|
5544c1 |
break;
|
|
|
5544c1 |
case 0x99:
|
|
|
5544c1 |
- gen_helper_cfdbr(cc_op, tmp32_1, tmp32_2, tmp32_3);
|
|
|
5544c1 |
+ gen_helper_cfdbr(cc_op, cpu_env, tmp32_1, tmp32_2, tmp32_3);
|
|
|
5544c1 |
break;
|
|
|
5544c1 |
case 0x9a:
|
|
|
5544c1 |
- gen_helper_cfxbr(cc_op, tmp32_1, tmp32_2, tmp32_3);
|
|
|
5544c1 |
+ gen_helper_cfxbr(cc_op, cpu_env, tmp32_1, tmp32_2, tmp32_3);
|
|
|
5544c1 |
break;
|
|
|
5544c1 |
default:
|
|
|
5544c1 |
tcg_abort();
|
|
|
5544c1 |
@@ -3213,10 +3213,10 @@ static void disas_b3(DisasContext *s, int op, int m3, int r1, int r2)
|
|
|
5544c1 |
tmp = load_reg(r2);
|
|
|
5544c1 |
switch (op) {
|
|
|
5544c1 |
case 0xa4:
|
|
|
5544c1 |
- gen_helper_cegbr(tmp32_1, tmp);
|
|
|
5544c1 |
+ gen_helper_cegbr(cpu_env, tmp32_1, tmp);
|
|
|
5544c1 |
break;
|
|
|
5544c1 |
case 0xa5:
|
|
|
5544c1 |
- gen_helper_cdgbr(tmp32_1, tmp);
|
|
|
5544c1 |
+ gen_helper_cdgbr(cpu_env, tmp32_1, tmp);
|
|
|
5544c1 |
break;
|
|
|
5544c1 |
default:
|
|
|
5544c1 |
tcg_abort();
|
|
|
5544c1 |
@@ -3227,7 +3227,7 @@ static void disas_b3(DisasContext *s, int op, int m3, int r1, int r2)
|
|
|
5544c1 |
case 0xa6: /* CXGBR R1,R2 [RRE] */
|
|
|
5544c1 |
tmp32_1 = tcg_const_i32(r1);
|
|
|
5544c1 |
tmp = load_reg(r2);
|
|
|
5544c1 |
- gen_helper_cxgbr(tmp32_1, tmp);
|
|
|
5544c1 |
+ gen_helper_cxgbr(cpu_env, tmp32_1, tmp);
|
|
|
5544c1 |
tcg_temp_free_i32(tmp32_1);
|
|
|
5544c1 |
tcg_temp_free_i64(tmp);
|
|
|
5544c1 |
break;
|
|
|
5544c1 |
@@ -3235,7 +3235,7 @@ static void disas_b3(DisasContext *s, int op, int m3, int r1, int r2)
|
|
|
5544c1 |
tmp32_1 = tcg_const_i32(r1);
|
|
|
5544c1 |
tmp32_2 = tcg_const_i32(r2);
|
|
|
5544c1 |
tmp32_3 = tcg_const_i32(m3);
|
|
|
5544c1 |
- gen_helper_cgebr(cc_op, tmp32_1, tmp32_2, tmp32_3);
|
|
|
5544c1 |
+ gen_helper_cgebr(cc_op, cpu_env, tmp32_1, tmp32_2, tmp32_3);
|
|
|
5544c1 |
set_cc_static(s);
|
|
|
5544c1 |
tcg_temp_free_i32(tmp32_1);
|
|
|
5544c1 |
tcg_temp_free_i32(tmp32_2);
|
|
|
5544c1 |
@@ -3245,7 +3245,7 @@ static void disas_b3(DisasContext *s, int op, int m3, int r1, int r2)
|
|
|
5544c1 |
tmp32_1 = tcg_const_i32(r1);
|
|
|
5544c1 |
tmp32_2 = tcg_const_i32(r2);
|
|
|
5544c1 |
tmp32_3 = tcg_const_i32(m3);
|
|
|
5544c1 |
- gen_helper_cgdbr(cc_op, tmp32_1, tmp32_2, tmp32_3);
|
|
|
5544c1 |
+ gen_helper_cgdbr(cc_op, cpu_env, tmp32_1, tmp32_2, tmp32_3);
|
|
|
5544c1 |
set_cc_static(s);
|
|
|
5544c1 |
tcg_temp_free_i32(tmp32_1);
|
|
|
5544c1 |
tcg_temp_free_i32(tmp32_2);
|
|
|
5544c1 |
@@ -3255,7 +3255,7 @@ static void disas_b3(DisasContext *s, int op, int m3, int r1, int r2)
|
|
|
5544c1 |
tmp32_1 = tcg_const_i32(r1);
|
|
|
5544c1 |
tmp32_2 = tcg_const_i32(r2);
|
|
|
5544c1 |
tmp32_3 = tcg_const_i32(m3);
|
|
|
5544c1 |
- gen_helper_cgxbr(cc_op, tmp32_1, tmp32_2, tmp32_3);
|
|
|
5544c1 |
+ gen_helper_cgxbr(cc_op, cpu_env, tmp32_1, tmp32_2, tmp32_3);
|
|
|
5544c1 |
set_cc_static(s);
|
|
|
5544c1 |
tcg_temp_free_i32(tmp32_1);
|
|
|
5544c1 |
tcg_temp_free_i32(tmp32_2);
|
|
|
5544c1 |
--
|
|
|
5544c1 |
1.7.12.1
|
|
|
5544c1 |
|