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From e07526dd14669081a569bb6b1e3d72e1ee59ebad Mon Sep 17 00:00:00 2001
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From: Gerd Hoffmann <kraxel@redhat.com>
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Date: Wed, 7 Aug 2013 09:22:48 +0200
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Subject: [PATCH 17/28] xhci: add live migration support
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RH-Author: Gerd Hoffmann <kraxel@redhat.com>
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Message-id: <1375867368-18979-6-git-send-email-kraxel@redhat.com>
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Patchwork-id: 53041
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O-Subject: [RHEL-7 qemu-kvm PATCH 5/5] xhci: add live migration support
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Bugzilla: 838170
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RH-Acked-by: Hans de Goede <hdegoede@redhat.com>
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RH-Acked-by: Laszlo Ersek <lersek@redhat.com>
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RH-Acked-by: Orit Wasserman <owasserm@redhat.com>
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With all preparing pieces in place we can finally drop in
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the vmstate structs and the postload function.
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Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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(cherry picked from commit 37352df30fbc38d1de464db8927536d5e36cf52a)
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---
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hw/usb/hcd-xhci.c | 164 ++++++++++++++++++++++++++++++++++++++++++++++++++++-
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1 file changed, 163 insertions(+), 1 deletion(-)
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Signed-off-by: Miroslav Rezanina <mrezanin@redhat.com>
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---
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hw/usb/hcd-xhci.c | 164 ++++++++++++++++++++++++++++++++++++++++++++++++++++-
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1 files changed, 163 insertions(+), 1 deletions(-)
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diff --git a/hw/usb/hcd-xhci.c b/hw/usb/hcd-xhci.c
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index 8224465..3d3d6c3 100644
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--- a/hw/usb/hcd-xhci.c
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+++ b/hw/usb/hcd-xhci.c
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@@ -3386,9 +3386,171 @@ static int usb_xhci_initfn(struct PCIDevice *dev)
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return 0;
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}
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+static int usb_xhci_post_load(void *opaque, int version_id)
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+{
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+ XHCIState *xhci = opaque;
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+ XHCISlot *slot;
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+ XHCIEPContext *epctx;
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+ dma_addr_t dcbaap, pctx;
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+ uint32_t slot_ctx[4];
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+ uint32_t ep_ctx[5];
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+ int slotid, epid, state, intr;
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+
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+ dcbaap = xhci_addr64(xhci->dcbaap_low, xhci->dcbaap_high);
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+
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+ for (slotid = 1; slotid <= xhci->numslots; slotid++) {
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+ slot = &xhci->slots[slotid-1];
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+ if (!slot->addressed) {
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+ continue;
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+ }
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+ slot->ctx =
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+ xhci_mask64(ldq_le_pci_dma(&xhci->pci_dev, dcbaap + 8*slotid));
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+ xhci_dma_read_u32s(xhci, slot->ctx, slot_ctx, sizeof(slot_ctx));
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+ slot->uport = xhci_lookup_uport(xhci, slot_ctx);
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+ assert(slot->uport && slot->uport->dev);
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+
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+ for (epid = 1; epid <= 32; epid++) {
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+ pctx = slot->ctx + 32 * epid;
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+ xhci_dma_read_u32s(xhci, pctx, ep_ctx, sizeof(ep_ctx));
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+ state = ep_ctx[0] & EP_STATE_MASK;
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+ if (state == EP_DISABLED) {
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+ continue;
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+ }
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+ epctx = xhci_alloc_epctx(xhci, slotid, epid);
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+ slot->eps[epid-1] = epctx;
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+ xhci_init_epctx(epctx, pctx, ep_ctx);
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+ epctx->state = state;
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+ if (state == EP_RUNNING) {
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+ /* kick endpoint after vmload is finished */
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+ qemu_mod_timer(epctx->kick_timer, qemu_get_clock_ns(vm_clock));
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+ }
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+ }
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+ }
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+
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+ for (intr = 0; intr < xhci->numintrs; intr++) {
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+ if (xhci->intr[intr].msix_used) {
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+ msix_vector_use(&xhci->pci_dev, intr);
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+ } else {
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+ msix_vector_unuse(&xhci->pci_dev, intr);
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+ }
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+ }
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+
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+ return 0;
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+}
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+
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+static const VMStateDescription vmstate_xhci_ring = {
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+ .name = "xhci-ring",
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+ .version_id = 1,
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+ .fields = (VMStateField[]) {
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+ VMSTATE_UINT64(dequeue, XHCIRing),
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+ VMSTATE_BOOL(ccs, XHCIRing),
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+ VMSTATE_END_OF_LIST()
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+ }
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+};
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+
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+static const VMStateDescription vmstate_xhci_port = {
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+ .name = "xhci-port",
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+ .version_id = 1,
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+ .fields = (VMStateField[]) {
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+ VMSTATE_UINT32(portsc, XHCIPort),
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+ VMSTATE_END_OF_LIST()
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+ }
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+};
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+
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+static const VMStateDescription vmstate_xhci_slot = {
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+ .name = "xhci-slot",
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+ .version_id = 1,
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+ .fields = (VMStateField[]) {
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+ VMSTATE_BOOL(enabled, XHCISlot),
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+ VMSTATE_BOOL(addressed, XHCISlot),
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+ VMSTATE_END_OF_LIST()
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+ }
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+};
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+
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+static const VMStateDescription vmstate_xhci_event = {
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+ .name = "xhci-event",
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+ .version_id = 1,
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+ .fields = (VMStateField[]) {
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+ VMSTATE_UINT32(type, XHCIEvent),
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+ VMSTATE_UINT32(ccode, XHCIEvent),
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+ VMSTATE_UINT64(ptr, XHCIEvent),
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+ VMSTATE_UINT32(length, XHCIEvent),
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+ VMSTATE_UINT32(flags, XHCIEvent),
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+ VMSTATE_UINT8(slotid, XHCIEvent),
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+ VMSTATE_UINT8(epid, XHCIEvent),
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+ }
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+};
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+
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+static bool xhci_er_full(void *opaque, int version_id)
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+{
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+ struct XHCIInterrupter *intr = opaque;
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+ return intr->er_full;
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+}
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+
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+static const VMStateDescription vmstate_xhci_intr = {
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+ .name = "xhci-intr",
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+ .version_id = 1,
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+ .fields = (VMStateField[]) {
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+ /* registers */
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+ VMSTATE_UINT32(iman, XHCIInterrupter),
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+ VMSTATE_UINT32(imod, XHCIInterrupter),
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+ VMSTATE_UINT32(erstsz, XHCIInterrupter),
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+ VMSTATE_UINT32(erstba_low, XHCIInterrupter),
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+ VMSTATE_UINT32(erstba_high, XHCIInterrupter),
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+ VMSTATE_UINT32(erdp_low, XHCIInterrupter),
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+ VMSTATE_UINT32(erdp_high, XHCIInterrupter),
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+
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+ /* state */
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+ VMSTATE_BOOL(msix_used, XHCIInterrupter),
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+ VMSTATE_BOOL(er_pcs, XHCIInterrupter),
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+ VMSTATE_UINT64(er_start, XHCIInterrupter),
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+ VMSTATE_UINT32(er_size, XHCIInterrupter),
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+ VMSTATE_UINT32(er_ep_idx, XHCIInterrupter),
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+
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+ /* event queue (used if ring is full) */
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+ VMSTATE_BOOL(er_full, XHCIInterrupter),
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+ VMSTATE_UINT32_TEST(ev_buffer_put, XHCIInterrupter, xhci_er_full),
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+ VMSTATE_UINT32_TEST(ev_buffer_get, XHCIInterrupter, xhci_er_full),
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+ VMSTATE_STRUCT_ARRAY_TEST(ev_buffer, XHCIInterrupter, EV_QUEUE,
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+ xhci_er_full, 1,
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+ vmstate_xhci_event, XHCIEvent),
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+
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+ VMSTATE_END_OF_LIST()
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+ }
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+};
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+
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static const VMStateDescription vmstate_xhci = {
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.name = "xhci",
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- .unmigratable = 1,
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+ .version_id = 1,
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+ .post_load = usb_xhci_post_load,
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+ .fields = (VMStateField[]) {
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+ VMSTATE_PCIE_DEVICE(pci_dev, XHCIState),
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+ VMSTATE_MSIX(pci_dev, XHCIState),
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+
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+ VMSTATE_STRUCT_VARRAY_UINT32(ports, XHCIState, numports, 1,
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+ vmstate_xhci_port, XHCIPort),
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+ VMSTATE_STRUCT_VARRAY_UINT32(slots, XHCIState, numslots, 1,
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+ vmstate_xhci_slot, XHCISlot),
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+ VMSTATE_STRUCT_VARRAY_UINT32(intr, XHCIState, numintrs, 1,
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+ vmstate_xhci_intr, XHCIInterrupter),
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+
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+ /* Operational Registers */
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+ VMSTATE_UINT32(usbcmd, XHCIState),
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+ VMSTATE_UINT32(usbsts, XHCIState),
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+ VMSTATE_UINT32(dnctrl, XHCIState),
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+ VMSTATE_UINT32(crcr_low, XHCIState),
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+ VMSTATE_UINT32(crcr_high, XHCIState),
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+ VMSTATE_UINT32(dcbaap_low, XHCIState),
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+ VMSTATE_UINT32(dcbaap_high, XHCIState),
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+ VMSTATE_UINT32(config, XHCIState),
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+
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+ /* Runtime Registers & state */
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+ VMSTATE_INT64(mfindex_start, XHCIState),
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+ VMSTATE_TIMER(mfwrap_timer, XHCIState),
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+ VMSTATE_STRUCT(cmd_ring, XHCIState, 1, vmstate_xhci_ring, XHCIRing),
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+
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+ VMSTATE_END_OF_LIST()
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+ }
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};
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static Property xhci_properties[] = {
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--
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1.7.1
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