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Blame SOURCES/kvm-target-i386-Add-support-for-UMIP-and-RDPID-CPUID-bit.patch

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From 9349e4be5ecf8b70dfc36f6cad56297cd7aa5fc9 Mon Sep 17 00:00:00 2001
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From: "plai@redhat.com" <plai@redhat.com>
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Date: Wed, 27 Jun 2018 07:53:07 +0200
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Subject: [PATCH 02/17] target-i386: Add support for UMIP and RDPID CPUID bits
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RH-Author: plai@redhat.com
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Message-id: <1526495303-9837-1-git-send-email-plai@redhat.com>
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Patchwork-id: 80372
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O-Subject: [RHEL7.6 PATCH BZ 1526638] target-i386: Add support for UMIP and RDPID CPUID bits
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Bugzilla: 1526638
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RH-Acked-by: Eduardo Habkost <ehabkost@redhat.com>
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RH-Acked-by: Igor Mammedov <imammedo@redhat.com>
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RH-Acked-by: Miroslav Rezanina <mrezanin@redhat.com>
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From: Paolo Bonzini <pbonzini@redhat.com>
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Tested by Intel OTC QA on icelake client hw.
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Tested by Intel OTC Virtualization QA. Test Result:
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   XEN_UMIP_ENABLE : Check if UMIP has been enabled on the feature supported machine / PASS
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   XEN_UMIP_DISABLE: Verify if the UMIP can be turned off by boot. / PASS
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   XEN_UMIP_TEST : Check if the protection effect on the instructions of sgdt/sidt/sldt/smsw/str / PASS
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   XEN_UMIP_EX_TEST :Check if the protection effects on instruction of str, sldtand smsw for register and memory operands. /PASS
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   XEN_UMIP_TEST: Check if the protection effect on the instructions of sgdt/sidt/sldt/smsw/str / PASS
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   XEN_UMIP_EX_TEST: Check if the protection effects on instruction of str, sldtand smsw for register and memory operands / PASS
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   XEN_UMIP_LDT: Verify all the possible 32-bit address encodings / PASS
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These are both stored in CPUID[EAX=7,EBX=0].ECX.  KVM is going to
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be able to emulate both (albeit with a performance loss in the case
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of RDPID, which therefore will be in KVM_GET_EMULATED_CPUID rather
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than KVM_GET_SUPPORTED_CPUID).
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It's also possible to implement both in TCG, but this is for 2.8.
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Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
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(cherry picked from commit c2f193b538032accb9db504998bf2ea7c0ef65af)
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Signed-off-by: Paul Lai <plai@redhat.com>
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Resolved Conflicts:
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	target-i386/cpu.c
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---
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 target-i386/cpu.c | 4 ++--
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 target-i386/cpu.h | 2 ++
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 2 files changed, 4 insertions(+), 2 deletions(-)
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diff --git a/target-i386/cpu.c b/target-i386/cpu.c
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index 48a5507..0254747 100644
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--- a/target-i386/cpu.c
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+++ b/target-i386/cpu.c
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@@ -155,12 +155,12 @@ static const char *cpuid_7_0_ebx_feature_name[] = {
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 };
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 static const char *cpuid_7_0_ecx_feature_name[] = {
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-    NULL, "avx512vbmi", NULL, "pku",
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+    NULL, "avx512vbmi", "umip", "pku",
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     "ospke", NULL, "avx512vbmi2", NULL,
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     "gfni", "vaes", "vpclmulqdq", "avx512vnni",
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     "avx512bitalg", NULL, "avx512-vpopcntdq", NULL,
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     NULL, NULL, NULL, NULL,
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-    NULL, NULL, NULL, NULL,
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+    NULL, NULL, "rdpid", NULL,
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     NULL, NULL, NULL, NULL,
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     NULL, NULL, NULL, NULL,
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 };
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diff --git a/target-i386/cpu.h b/target-i386/cpu.h
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index a781639..c72b545 100644
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--- a/target-i386/cpu.h
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+++ b/target-i386/cpu.h
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@@ -600,8 +600,10 @@ typedef uint32_t FeatureWordArray[FEATURE_WORDS];
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 #define CPUID_8000_0008_EBX_IBPB    (1U << 12) /* Indirect Branch Prediction Barrier */
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+#define CPUID_7_0_ECX_UMIP     (1U << 2)
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 #define CPUID_7_0_ECX_PKU      (1U << 3)
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 #define CPUID_7_0_ECX_OSPKE    (1U << 4)
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+#define CPUID_7_0_ECX_RDPID    (1U << 22)
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 #define CPUID_XSAVE_XSAVEOPT   (1U << 0)
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 #define CPUID_XSAVE_XSAVEC     (1U << 1)
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-- 
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1.8.3.1
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