cryptospore / rpms / qemu-kvm

Forked from rpms/qemu-kvm 2 years ago
Clone
0a122b
From 2059082c26d40f083807ae81476fedd0c22c613f Mon Sep 17 00:00:00 2001
0a122b
Message-Id: <2059082c26d40f083807ae81476fedd0c22c613f.1387298827.git.minovotn@redhat.com>
0a122b
In-Reply-To: <3ed0fb61a3dc912ef036d7ef450bed192090709e.1387298827.git.minovotn@redhat.com>
0a122b
References: <3ed0fb61a3dc912ef036d7ef450bed192090709e.1387298827.git.minovotn@redhat.com>
0a122b
From: "Michael S. Tsirkin" <mst@redhat.com>
0a122b
Date: Tue, 17 Dec 2013 15:17:08 +0100
0a122b
Subject: [PATCH 08/56] pci: fix up w64 size calculation helper
0a122b
0a122b
RH-Author: Michael S. Tsirkin <mst@redhat.com>
0a122b
Message-id: <1387293161-4085-9-git-send-email-mst@redhat.com>
0a122b
Patchwork-id: 56313
0a122b
O-Subject: [PATCH qemu-kvm RHEL7.0 v2 08/57] pci: fix up w64 size calculation helper
0a122b
Bugzilla: 1034876
0a122b
RH-Acked-by: Igor Mammedov <imammedo@redhat.com>
0a122b
RH-Acked-by: Marcel Apfelbaum <marcel.a@redhat.com>
0a122b
RH-Acked-by: Laszlo Ersek <lersek@redhat.com>
0a122b
0a122b
BAR base was calculated incorrectly.
0a122b
Use existing pci_bar_address to get it right.
0a122b
0a122b
Tested-by: Igor Mammedov <imammedo@redhat.com>
0a122b
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
0a122b
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
0a122b
(cherry picked from commit 77d6f4ea7608fe7f47c9d7beddd19191b2e852b2)
0a122b
---
0a122b
 hw/pci/pci.c | 20 ++++++++++++--------
0a122b
 1 file changed, 12 insertions(+), 8 deletions(-)
0a122b
0a122b
Signed-off-by: Michal Novotny <minovotn@redhat.com>
0a122b
---
0a122b
 hw/pci/pci.c | 20 ++++++++++++--------
0a122b
 1 file changed, 12 insertions(+), 8 deletions(-)
0a122b
0a122b
diff --git a/hw/pci/pci.c b/hw/pci/pci.c
0a122b
index d550851..598d288 100644
0a122b
--- a/hw/pci/pci.c
0a122b
+++ b/hw/pci/pci.c
0a122b
@@ -2249,7 +2249,7 @@ static void pci_dev_get_w64(PCIBus *b, PCIDevice *dev, void *opaque)
0a122b
     Range *range = opaque;
0a122b
     PCIDeviceClass *pc = PCI_DEVICE_GET_CLASS(dev);
0a122b
     uint16_t cmd = pci_get_word(dev->config + PCI_COMMAND);
0a122b
-    int r;
0a122b
+    int i;
0a122b
 
0a122b
     if (!(cmd & PCI_COMMAND_MEMORY)) {
0a122b
         return;
0a122b
@@ -2268,17 +2268,21 @@ static void pci_dev_get_w64(PCIBus *b, PCIDevice *dev, void *opaque)
0a122b
             range_extend(range, &pref_range);
0a122b
         }
0a122b
     }
0a122b
-    for (r = 0; r < PCI_NUM_REGIONS; ++r) {
0a122b
-        PCIIORegion *region = &dev->io_regions[r];
0a122b
+    for (i = 0; i < PCI_NUM_REGIONS; ++i) {
0a122b
+        PCIIORegion *r = &dev->io_regions[i];
0a122b
         Range region_range;
0a122b
 
0a122b
-        if (!region->size ||
0a122b
-            (region->type & PCI_BASE_ADDRESS_SPACE_IO) ||
0a122b
-            !(region->type & PCI_BASE_ADDRESS_MEM_TYPE_64)) {
0a122b
+        if (!r->size ||
0a122b
+            (r->type & PCI_BASE_ADDRESS_SPACE_IO) ||
0a122b
+            !(r->type & PCI_BASE_ADDRESS_MEM_TYPE_64)) {
0a122b
+            continue;
0a122b
+        }
0a122b
+        region_range.begin = pci_bar_address(dev, i, r->type, r->size);
0a122b
+        region_range.end = region_range.begin + r->size;
0a122b
+
0a122b
+        if (region_range.begin == PCI_BAR_UNMAPPED) {
0a122b
             continue;
0a122b
         }
0a122b
-        region_range.begin = pci_get_quad(dev->config + pci_bar(dev, r));
0a122b
-        region_range.end = region_range.begin + region->size;
0a122b
 
0a122b
         region_range.begin = MAX(region_range.begin, 0x1ULL << 32);
0a122b
 
0a122b
-- 
0a122b
1.7.11.7
0a122b