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From 3cb467f6950fee049415dfe54a5d0f498efaead8 Mon Sep 17 00:00:00 2001
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Message-Id: <3cb467f6950fee049415dfe54a5d0f498efaead8.1387298827.git.minovotn@redhat.com>
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In-Reply-To: <3ed0fb61a3dc912ef036d7ef450bed192090709e.1387298827.git.minovotn@redhat.com>
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References: <3ed0fb61a3dc912ef036d7ef450bed192090709e.1387298827.git.minovotn@redhat.com>
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From: "Michael S. Tsirkin" <mst@redhat.com>
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Date: Tue, 17 Dec 2013 15:18:52 +0100
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Subject: [PATCH 42/56] ich9: APIs for pc guest info
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RH-Author: Michael S. Tsirkin <mst@redhat.com>
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Message-id: <1387293161-4085-43-git-send-email-mst@redhat.com>
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Patchwork-id: 56348
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O-Subject: [PATCH qemu-kvm RHEL7.0 v2 42/57] ich9: APIs for pc guest info
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Bugzilla: 1034876
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RH-Acked-by: Igor Mammedov <imammedo@redhat.com>
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RH-Acked-by: Marcel Apfelbaum <marcel.a@redhat.com>
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RH-Acked-by: Laszlo Ersek <lersek@redhat.com>
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This adds APIs that will be used to fill in
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acpi tables, implemented using QOM,
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to various ich9 components.
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Some information is still missing in QOM,
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so we fall back on lookups by type instead.
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Reviewed-by: Gerd Hoffmann <kraxel@redhat.com>
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Tested-by: Gerd Hoffmann <kraxel@redhat.com>
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Reviewed-by: Igor Mammedov <imammedo@redhat.com>
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Tested-by: Igor Mammedov <imammedo@redhat.com>
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Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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(cherry picked from commit 6f1426ab0fad715bccbad60e976ebf420442006c)
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---
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 include/hw/acpi/ich9.h    |  2 ++
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 include/hw/i386/ich9.h    |  2 ++
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 include/hw/pci-host/q35.h |  2 ++
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 hw/acpi/ich9.c            | 24 ++++++++++++++++++++++++
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 hw/isa/lpc_ich9.c         | 40 ++++++++++++++++++++++++++++++++++++++++
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 hw/pci-host/q35.c         | 10 ++++++++++
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 6 files changed, 80 insertions(+)
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Signed-off-by: Michal Novotny <minovotn@redhat.com>
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---
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 hw/acpi/ich9.c            | 24 ++++++++++++++++++++++++
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 hw/isa/lpc_ich9.c         | 40 ++++++++++++++++++++++++++++++++++++++++
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 hw/pci-host/q35.c         | 10 ++++++++++
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 include/hw/acpi/ich9.h    |  2 ++
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 include/hw/i386/ich9.h    |  2 ++
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 include/hw/pci-host/q35.h |  2 ++
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 6 files changed, 80 insertions(+)
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diff --git a/hw/acpi/ich9.c b/hw/acpi/ich9.c
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index 4a17f32..e747183 100644
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--- a/hw/acpi/ich9.c
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+++ b/hw/acpi/ich9.c
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@@ -24,6 +24,7 @@
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  * GNU GPL, version 2 or (at your option) any later version.
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  */
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 #include "hw/hw.h"
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+#include "qapi/visitor.h"
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 #include "hw/i386/pc.h"
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 #include "hw/pci/pci.h"
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 #include "qemu/timer.h"
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@@ -228,3 +229,26 @@ void ich9_pm_init(PCIDevice *lpc_pci, ICH9LPCPMRegs *pm,
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     pm->powerdown_notifier.notify = pm_powerdown_req;
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     qemu_register_powerdown_notifier(&pm->powerdown_notifier);
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 }
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+
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+static void ich9_pm_get_gpe0_blk(Object *obj, Visitor *v,
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+                                 void *opaque, const char *name,
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+                                 Error **errp)
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+{
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+    ICH9LPCPMRegs *pm = opaque;
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+    uint32_t value = pm->pm_io_base + ICH9_PMIO_GPE0_STS;
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+
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+    visit_type_uint32(v, &value, name, errp);
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+}
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+
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+void ich9_pm_add_properties(Object *obj, ICH9LPCPMRegs *pm, Error **errp)
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+{
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+    static const uint32_t gpe0_len = ICH9_PMIO_GPE0_LEN;
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+
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+    object_property_add_uint32_ptr(obj, ACPI_PM_PROP_PM_IO_BASE,
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+                                   &pm->pm_io_base, errp);
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+    object_property_add(obj, ACPI_PM_PROP_GPE0_BLK, "uint32",
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+                        ich9_pm_get_gpe0_blk,
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+                        NULL, NULL, pm, NULL);
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+    object_property_add_uint32_ptr(obj, ACPI_PM_PROP_GPE0_BLK_LEN,
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+                                   &gpe0_len, errp);
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+}
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diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c
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index 4f834b9..7a5a92f 100644
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--- a/hw/isa/lpc_ich9.c
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+++ b/hw/isa/lpc_ich9.c
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@@ -29,6 +29,7 @@
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  */
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 #include "qemu-common.h"
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 #include "hw/hw.h"
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+#include "qapi/visitor.h"
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 #include "qemu/range.h"
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 #include "hw/isa/isa.h"
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 #include "hw/sysbus.h"
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@@ -524,6 +525,43 @@ static const MemoryRegionOps ich9_rst_cnt_ops = {
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     .endianness = DEVICE_LITTLE_ENDIAN
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 };
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+Object *ich9_lpc_find(void)
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+{
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+    bool ambig;
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+    Object *o = object_resolve_path_type("", TYPE_ICH9_LPC_DEVICE, &ambig);
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+
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+    if (ambig) {
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+        return NULL;
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+    }
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+    return o;
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+}
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+
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+static void ich9_lpc_get_sci_int(Object *obj, Visitor *v,
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+                                 void *opaque, const char *name,
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+                                 Error **errp)
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+{
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+    ICH9LPCState *lpc = ICH9_LPC_DEVICE(obj);
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+    uint32_t value = ich9_lpc_sci_irq(lpc);
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+
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+    visit_type_uint32(v, &value, name, errp);
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+}
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+
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+static void ich9_lpc_add_properties(ICH9LPCState *lpc)
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+{
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+    static const uint8_t acpi_enable_cmd = ICH9_APM_ACPI_ENABLE;
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+    static const uint8_t acpi_disable_cmd = ICH9_APM_ACPI_DISABLE;
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+
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+    object_property_add(OBJECT(lpc), ACPI_PM_PROP_SCI_INT, "uint32",
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+                        ich9_lpc_get_sci_int,
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+                        NULL, NULL, NULL, NULL);
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+    object_property_add_uint8_ptr(OBJECT(lpc), ACPI_PM_PROP_ACPI_ENABLE_CMD,
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+                                  &acpi_enable_cmd, NULL);
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+    object_property_add_uint8_ptr(OBJECT(lpc), ACPI_PM_PROP_ACPI_DISABLE_CMD,
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+                                  &acpi_disable_cmd, NULL);
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+
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+    ich9_pm_add_properties(OBJECT(lpc), &lpc->pm, NULL);
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+}
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+
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 static int ich9_lpc_initfn(PCIDevice *d)
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 {
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     ICH9LPCState *lpc = ICH9_LPC_DEVICE(d);
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@@ -551,6 +589,8 @@ static int ich9_lpc_initfn(PCIDevice *d)
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                                         ICH9_RST_CNT_IOPORT, &lpc->rst_cnt_mem,
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                                         1);
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+    ich9_lpc_add_properties(lpc);
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+
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     return 0;
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 }
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diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c
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index 87691d1..befa9d4 100644
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--- a/hw/pci-host/q35.c
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+++ b/hw/pci-host/q35.c
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@@ -378,6 +378,16 @@ static int mch_init(PCIDevice *d)
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     return 0;
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 }
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+uint64_t mch_mcfg_base(void)
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+{
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+    bool ambiguous;
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+    Object *o = object_resolve_path_type("", TYPE_MCH_PCI_DEVICE, &ambiguous);
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+    if (!o) {
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+        return 0;
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+    }
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+    return MCH_HOST_BRIDGE_PCIEXBAR_DEFAULT;
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+}
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+
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 static void mch_class_init(ObjectClass *klass, void *data)
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 {
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     PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
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diff --git a/include/hw/acpi/ich9.h b/include/hw/acpi/ich9.h
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index b1fe71f..82fcf9f 100644
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--- a/include/hw/acpi/ich9.h
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+++ b/include/hw/acpi/ich9.h
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@@ -49,4 +49,6 @@ void ich9_pm_init(PCIDevice *lpc_pci, ICH9LPCPMRegs *pm,
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 void ich9_pm_iospace_update(ICH9LPCPMRegs *pm, uint32_t pm_io_base);
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 extern const VMStateDescription vmstate_ich9_pm;
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+void ich9_pm_add_properties(Object *obj, ICH9LPCPMRegs *pm, Error **errp);
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+
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 #endif /* HW_ACPI_ICH9_H */
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diff --git a/include/hw/i386/ich9.h b/include/hw/i386/ich9.h
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index c5f637b..4a68b35 100644
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--- a/include/hw/i386/ich9.h
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+++ b/include/hw/i386/ich9.h
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@@ -66,6 +66,8 @@ typedef struct ICH9LPCState {
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     qemu_irq *ioapic;
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 } ICH9LPCState;
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+Object *ich9_lpc_find(void);
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+
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 #define Q35_MASK(bit, ms_bit, ls_bit) \
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 ((uint##bit##_t)(((1ULL << ((ms_bit) + 1)) - 1) & ~((1ULL << ls_bit) - 1)))
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diff --git a/include/hw/pci-host/q35.h b/include/hw/pci-host/q35.h
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index e660a40..856d39f 100644
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--- a/include/hw/pci-host/q35.h
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+++ b/include/hw/pci-host/q35.h
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@@ -150,4 +150,6 @@ typedef struct Q35PCIHost {
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 #define MCH_PCIE_DEV                           1
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 #define MCH_PCIE_FUNC                          0
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+uint64_t mch_mcfg_base(void);
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+
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 #endif /* HW_Q35_H */
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-- 
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1.7.11.7
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