cryptospore / rpms / qemu-kvm

Forked from rpms/qemu-kvm 2 years ago
Clone
0a122b
From b451ecc8fa5bb1283a1dddc20057282676ad2593 Mon Sep 17 00:00:00 2001
0a122b
Message-Id: <b451ecc8fa5bb1283a1dddc20057282676ad2593.1387298827.git.minovotn@redhat.com>
0a122b
In-Reply-To: <3ed0fb61a3dc912ef036d7ef450bed192090709e.1387298827.git.minovotn@redhat.com>
0a122b
References: <3ed0fb61a3dc912ef036d7ef450bed192090709e.1387298827.git.minovotn@redhat.com>
0a122b
From: "Michael S. Tsirkin" <mst@redhat.com>
0a122b
Date: Tue, 17 Dec 2013 15:19:08 +0100
0a122b
Subject: [PATCH 48/56] i386: ACPI table generation code from seabios
0a122b
0a122b
RH-Author: Michael S. Tsirkin <mst@redhat.com>
0a122b
Message-id: <1387293161-4085-49-git-send-email-mst@redhat.com>
0a122b
Patchwork-id: 56354
0a122b
O-Subject: [PATCH qemu-kvm RHEL7.0 v2 48/57] i386: ACPI table generation code from seabios
0a122b
Bugzilla: 1034876
0a122b
RH-Acked-by: Igor Mammedov <imammedo@redhat.com>
0a122b
RH-Acked-by: Marcel Apfelbaum <marcel.a@redhat.com>
0a122b
RH-Acked-by: Laszlo Ersek <lersek@redhat.com>
0a122b
0a122b
This adds C code for generating ACPI tables at runtime,
0a122b
imported from seabios git tree
0a122b
    commit 51684b7ced75fb76776e8ee84833fcfb6ecf12dd
0a122b
0a122b
Although ACPI tables come from a system BIOS on real hw,
0a122b
it makes sense that the ACPI tables are coupled with the
0a122b
virtual machine, since they have to abstract the x86 machine to
0a122b
the OS's.
0a122b
0a122b
This is widely desired as a way to avoid the churn
0a122b
and proliferation of QEMU-specific interfaces
0a122b
associated with ACPI tables in bios code.
0a122b
0a122b
Notes:
0a122b
As BIOS can reprogram devices prior to loading
0a122b
ACPI tables, we pre-format ACPI tables but defer loading
0a122b
hardware configuration there until tables are loaded.
0a122b
0a122b
The code structure was intentionally kept as close
0a122b
to the seabios original as possible, to simplify
0a122b
comparison and making sure we didn't lose anything
0a122b
in translation.
0a122b
0a122b
Minor code duplication results, to help ensure there are no functional
0a122b
regressions, I think it's better to merge it like this and do more code
0a122b
changes in follow-up patches.
0a122b
0a122b
Cross-version compatibility concerns have been addressed:
0a122b
    ACPI tables are exposed to guest as FW_CFG entries.
0a122b
    When running with -M 1.5 and older, this patch disables ACPI
0a122b
    table generation, and doesn't expose ACPI
0a122b
    tables to guest.
0a122b
0a122b
    As table content is likely to change over time,
0a122b
    the following measures are taken to simplify
0a122b
    cross-version migration:
0a122b
    - All tables besides the RSDP are packed in a single FW CFG entry.
0a122b
      This entry size is currently 23K. We round it up to 64K
0a122b
      to avoid too much churn there.
0a122b
    - Tables are placed in special ROM blob (not mapped into guest memory)
0a122b
      which is automatically migrated together with the guest, same
0a122b
      as BIOS code.
0a122b
    - Offsets where hardware configuration is loaded in ACPI tables
0a122b
      are also migrated, this is in case future ACPI changes make us
0a122b
      rearrange the tables in memory.
0a122b
0a122b
This patch reuses some code from SeaBIOS, which was originally under
0a122b
LGPLv2 and then relicensed to GPLv3 or LGPLv3, in QEMU under GPLv2+. This
0a122b
relicensing has been acked by all contributors that had contributed to the
0a122b
code since the v2->v3 relicense. ACKs approving the v2+ relicensing are
0a122b
listed below. The list might include ACKs from people not holding
0a122b
copyright on any parts of the reused code, but it's better to err on the
0a122b
side of caution and include them.
0a122b
0a122b
Affected SeaBIOS files (GPLv2+ license headers added)
0a122b
<http://thread.gmane.org/gmane.comp.bios.coreboot.seabios/5949>:
0a122b
0a122b
 src/acpi-dsdt-cpu-hotplug.dsl
0a122b
 src/acpi-dsdt-dbug.dsl
0a122b
 src/acpi-dsdt-hpet.dsl
0a122b
 src/acpi-dsdt-isa.dsl
0a122b
 src/acpi-dsdt-pci-crs.dsl
0a122b
 src/acpi.c
0a122b
 src/acpi.h
0a122b
 src/ssdt-misc.dsl
0a122b
 src/ssdt-pcihp.dsl
0a122b
 src/ssdt-proc.dsl
0a122b
 tools/acpi_extract.py
0a122b
 tools/acpi_extract_preprocess.py
0a122b
0a122b
Each one of the listed people agreed to the following:
0a122b
0a122b
> If you allow the use of your contribution in QEMU under the
0a122b
> terms of GPLv2 or later as proposed by this patch,
0a122b
> please respond to this mail including the line:
0a122b
>
0a122b
> Acked-by: Name <email address>
0a122b
0a122b
  Acked-by: Gerd Hoffmann <kraxel@redhat.com>
0a122b
  Acked-by: Jan Kiszka <jan.kiszka@siemens.com>
0a122b
  Acked-by: Jason Baron <jbaron@akamai.com>
0a122b
  Acked-by: David Woodhouse <David.Woodhouse@intel.com>
0a122b
  Acked-by: Gleb Natapov <gleb@redhat.com>
0a122b
  Acked-by: Marcelo Tosatti <mtosatti@redhat.com>
0a122b
  Acked-by: Dave Frodin <dave.frodin@se-eng.com>
0a122b
  Acked-by: Paolo Bonzini <pbonzini@redhat.com>
0a122b
  Acked-by: Kevin O'Connor <kevin@koconnor.net>
0a122b
  Acked-by: Laszlo Ersek <lersek@redhat.com>
0a122b
  Acked-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
0a122b
  Acked-by: Isaku Yamahata <yamahata@valinux.co.jp>
0a122b
  Acked-by: Magnus Christensson <magnus.christensson@intel.com>
0a122b
  Acked-by: Hu Tao <hutao@cn.fujitsu.com>
0a122b
  Acked-by: Eduardo Habkost <ehabkost@redhat.com>
0a122b
0a122b
Reviewed-by: Gerd Hoffmann <kraxel@redhat.com>
0a122b
Tested-by: Gerd Hoffmann <kraxel@redhat.com>
0a122b
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
0a122b
Tested-by: Igor Mammedov <imammedo@redhat.com>
0a122b
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
0a122b
(cherry picked from commit 72c194f7e75cb64b2558111cb111adb49fbf4097)
0a122b
0a122b
Conflicts:
0a122b
	hw/i386/pc_piix.c
0a122b
	hw/i386/pc_q35.c
0a122b
---
0a122b
 hw/i386/acpi-build.h  |    9 +
0a122b
 hw/i386/acpi-defs.h   |  331 ++++++++++++++
0a122b
 include/hw/i386/pc.h  |    1 +
0a122b
 hw/i386/acpi-build.c  | 1214 +++++++++++++++++++++++++++++++++++++++++++++++++
0a122b
 hw/i386/pc.c          |    2 +
0a122b
 hw/i386/pc_piix.c     |    5 +
0a122b
 hw/i386/pc_q35.c      |    2 +
0a122b
 hw/i386/Makefile.objs |    4 +
0a122b
 8 files changed, 1568 insertions(+)
0a122b
 create mode 100644 hw/i386/acpi-build.h
0a122b
 create mode 100644 hw/i386/acpi-defs.h
0a122b
 create mode 100644 hw/i386/acpi-build.c
0a122b
0a122b
Signed-off-by: Michal Novotny <minovotn@redhat.com>
0a122b
---
0a122b
 hw/i386/Makefile.objs |    4 +
0a122b
 hw/i386/acpi-build.c  | 1214 +++++++++++++++++++++++++++++++++++++++++++++++++
0a122b
 hw/i386/acpi-build.h  |    9 +
0a122b
 hw/i386/acpi-defs.h   |  331 ++++++++++++++
0a122b
 hw/i386/pc.c          |    2 +
0a122b
 hw/i386/pc_piix.c     |    5 +
0a122b
 hw/i386/pc_q35.c      |    2 +
0a122b
 include/hw/i386/pc.h  |    1 +
0a122b
 8 files changed, 1568 insertions(+)
0a122b
 create mode 100644 hw/i386/acpi-build.c
0a122b
 create mode 100644 hw/i386/acpi-build.h
0a122b
 create mode 100644 hw/i386/acpi-defs.h
0a122b
0a122b
diff --git a/hw/i386/Makefile.objs b/hw/i386/Makefile.objs
0a122b
index 71be2da..6754fd5 100644
0a122b
--- a/hw/i386/Makefile.objs
0a122b
+++ b/hw/i386/Makefile.objs
0a122b
@@ -4,7 +4,11 @@ obj-y += pc.o pc_piix.o pc_q35.o
0a122b
 obj-$(CONFIG_XEN) += xen_domainbuild.o xen_machine_pv.o
0a122b
 
0a122b
 obj-y += kvmvapic.o
0a122b
+obj-y += acpi-build.o
0a122b
 obj-y += bios-linker-loader.o
0a122b
+hw/i386/acpi-build.o: hw/i386/acpi-build.c hw/i386/acpi-dsdt.hex \
0a122b
+	hw/i386/ssdt-proc.hex hw/i386/ssdt-pcihp.hex hw/i386/ssdt-misc.hex \
0a122b
+	hw/i386/acpi-dsdt.hex hw/i386/q35-acpi-dsdt.hex
0a122b
 
0a122b
 iasl-option=$(shell if test -z "`$(1) $(2) 2>&1 > /dev/null`" \
0a122b
     ; then echo "$(2)"; else echo "$(3)"; fi ;)
0a122b
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
0a122b
new file mode 100644
0a122b
index 0000000..6cfa044
0a122b
--- /dev/null
0a122b
+++ b/hw/i386/acpi-build.c
0a122b
@@ -0,0 +1,1214 @@
0a122b
+/* Support for generating ACPI tables and passing them to Guests
0a122b
+ *
0a122b
+ * Copyright (C) 2008-2010  Kevin O'Connor <kevin@koconnor.net>
0a122b
+ * Copyright (C) 2006 Fabrice Bellard
0a122b
+ * Copyright (C) 2013 Red Hat Inc
0a122b
+ *
0a122b
+ * Author: Michael S. Tsirkin <mst@redhat.com>
0a122b
+ *
0a122b
+ * This program is free software; you can redistribute it and/or modify
0a122b
+ * it under the terms of the GNU General Public License as published by
0a122b
+ * the Free Software Foundation; either version 2 of the License, or
0a122b
+ * (at your option) any later version.
0a122b
+
0a122b
+ * This program is distributed in the hope that it will be useful,
0a122b
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
0a122b
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
0a122b
+ * GNU General Public License for more details.
0a122b
+
0a122b
+ * You should have received a copy of the GNU General Public License along
0a122b
+ * with this program; if not, see <http://www.gnu.org/licenses/>.
0a122b
+ */
0a122b
+
0a122b
+#include "acpi-build.h"
0a122b
+#include <stddef.h>
0a122b
+#include <glib.h>
0a122b
+#include "qemu-common.h"
0a122b
+#include "qemu/bitmap.h"
0a122b
+#include "qemu/range.h"
0a122b
+#include "hw/pci/pci.h"
0a122b
+#include "qom/cpu.h"
0a122b
+#include "hw/i386/pc.h"
0a122b
+#include "target-i386/cpu.h"
0a122b
+#include "hw/timer/hpet.h"
0a122b
+#include "hw/i386/acpi-defs.h"
0a122b
+#include "hw/acpi/acpi.h"
0a122b
+#include "hw/nvram/fw_cfg.h"
0a122b
+#include "bios-linker-loader.h"
0a122b
+#include "hw/loader.h"
0a122b
+
0a122b
+/* Supported chipsets: */
0a122b
+#include "hw/acpi/piix4.h"
0a122b
+#include "hw/i386/ich9.h"
0a122b
+#include "hw/pci/pci_bus.h"
0a122b
+#include "hw/pci-host/q35.h"
0a122b
+
0a122b
+#include "hw/i386/q35-acpi-dsdt.hex"
0a122b
+#include "hw/i386/acpi-dsdt.hex"
0a122b
+
0a122b
+#include "qapi/qmp/qint.h"
0a122b
+#include "qom/qom-qobject.h"
0a122b
+
0a122b
+typedef struct AcpiCpuInfo {
0a122b
+    DECLARE_BITMAP(found_cpus, MAX_CPUMASK_BITS + 1);
0a122b
+} AcpiCpuInfo;
0a122b
+
0a122b
+typedef struct AcpiMcfgInfo {
0a122b
+    uint64_t mcfg_base;
0a122b
+    uint32_t mcfg_size;
0a122b
+} AcpiMcfgInfo;
0a122b
+
0a122b
+typedef struct AcpiPmInfo {
0a122b
+    bool s3_disabled;
0a122b
+    bool s4_disabled;
0a122b
+    uint8_t s4_val;
0a122b
+    uint16_t sci_int;
0a122b
+    uint8_t acpi_enable_cmd;
0a122b
+    uint8_t acpi_disable_cmd;
0a122b
+    uint32_t gpe0_blk;
0a122b
+    uint32_t gpe0_blk_len;
0a122b
+    uint32_t io_base;
0a122b
+} AcpiPmInfo;
0a122b
+
0a122b
+typedef struct AcpiMiscInfo {
0a122b
+    bool has_hpet;
0a122b
+    DECLARE_BITMAP(slot_hotplug_enable, PCI_SLOT_MAX);
0a122b
+    const unsigned char *dsdt_code;
0a122b
+    unsigned dsdt_size;
0a122b
+    uint16_t pvpanic_port;
0a122b
+} AcpiMiscInfo;
0a122b
+
0a122b
+static void acpi_get_dsdt(AcpiMiscInfo *info)
0a122b
+{
0a122b
+    Object *piix = piix4_pm_find();
0a122b
+    Object *lpc = ich9_lpc_find();
0a122b
+    assert(!!piix != !!lpc);
0a122b
+
0a122b
+    if (piix) {
0a122b
+        info->dsdt_code = AcpiDsdtAmlCode;
0a122b
+        info->dsdt_size = sizeof AcpiDsdtAmlCode;
0a122b
+    }
0a122b
+    if (lpc) {
0a122b
+        info->dsdt_code = Q35AcpiDsdtAmlCode;
0a122b
+        info->dsdt_size = sizeof Q35AcpiDsdtAmlCode;
0a122b
+    }
0a122b
+}
0a122b
+
0a122b
+static
0a122b
+int acpi_add_cpu_info(Object *o, void *opaque)
0a122b
+{
0a122b
+    AcpiCpuInfo *cpu = opaque;
0a122b
+    uint64_t apic_id;
0a122b
+
0a122b
+    if (object_dynamic_cast(o, TYPE_CPU)) {
0a122b
+        apic_id = object_property_get_int(o, "apic-id", NULL);
0a122b
+        assert(apic_id <= MAX_CPUMASK_BITS);
0a122b
+
0a122b
+        set_bit(apic_id, cpu->found_cpus);
0a122b
+    }
0a122b
+
0a122b
+    object_child_foreach(o, acpi_add_cpu_info, opaque);
0a122b
+    return 0;
0a122b
+}
0a122b
+
0a122b
+static void acpi_get_cpu_info(AcpiCpuInfo *cpu)
0a122b
+{
0a122b
+    Object *root = object_get_root();
0a122b
+
0a122b
+    memset(cpu->found_cpus, 0, sizeof cpu->found_cpus);
0a122b
+    object_child_foreach(root, acpi_add_cpu_info, cpu);
0a122b
+}
0a122b
+
0a122b
+static void acpi_get_pm_info(AcpiPmInfo *pm)
0a122b
+{
0a122b
+    Object *piix = piix4_pm_find();
0a122b
+    Object *lpc = ich9_lpc_find();
0a122b
+    Object *obj = NULL;
0a122b
+    QObject *o;
0a122b
+
0a122b
+    if (piix) {
0a122b
+        obj = piix;
0a122b
+    }
0a122b
+    if (lpc) {
0a122b
+        obj = lpc;
0a122b
+    }
0a122b
+    assert(obj);
0a122b
+
0a122b
+    /* Fill in optional s3/s4 related properties */
0a122b
+    o = object_property_get_qobject(obj, ACPI_PM_PROP_S3_DISABLED, NULL);
0a122b
+    if (o) {
0a122b
+        pm->s3_disabled = qint_get_int(qobject_to_qint(o));
0a122b
+    } else {
0a122b
+        pm->s3_disabled = false;
0a122b
+    }
0a122b
+    o = object_property_get_qobject(obj, ACPI_PM_PROP_S4_DISABLED, NULL);
0a122b
+    if (o) {
0a122b
+        pm->s4_disabled = qint_get_int(qobject_to_qint(o));
0a122b
+    } else {
0a122b
+        pm->s4_disabled = false;
0a122b
+    }
0a122b
+    o = object_property_get_qobject(obj, ACPI_PM_PROP_S4_VAL, NULL);
0a122b
+    if (o) {
0a122b
+        pm->s4_val = qint_get_int(qobject_to_qint(o));
0a122b
+    } else {
0a122b
+        pm->s4_val = false;
0a122b
+    }
0a122b
+
0a122b
+    /* Fill in mandatory properties */
0a122b
+    pm->sci_int = object_property_get_int(obj, ACPI_PM_PROP_SCI_INT, NULL);
0a122b
+
0a122b
+    pm->acpi_enable_cmd = object_property_get_int(obj,
0a122b
+                                                  ACPI_PM_PROP_ACPI_ENABLE_CMD,
0a122b
+                                                  NULL);
0a122b
+    pm->acpi_disable_cmd = object_property_get_int(obj,
0a122b
+                                                  ACPI_PM_PROP_ACPI_DISABLE_CMD,
0a122b
+                                                  NULL);
0a122b
+    pm->io_base = object_property_get_int(obj, ACPI_PM_PROP_PM_IO_BASE,
0a122b
+                                          NULL);
0a122b
+    pm->gpe0_blk = object_property_get_int(obj, ACPI_PM_PROP_GPE0_BLK,
0a122b
+                                           NULL);
0a122b
+    pm->gpe0_blk_len = object_property_get_int(obj, ACPI_PM_PROP_GPE0_BLK_LEN,
0a122b
+                                               NULL);
0a122b
+}
0a122b
+
0a122b
+static void acpi_get_hotplug_info(AcpiMiscInfo *misc)
0a122b
+{
0a122b
+    int i;
0a122b
+    PCIBus *bus = find_i440fx();
0a122b
+
0a122b
+    if (!bus) {
0a122b
+        /* Only PIIX supports ACPI hotplug */
0a122b
+        memset(misc->slot_hotplug_enable, 0, sizeof misc->slot_hotplug_enable);
0a122b
+        return;
0a122b
+    }
0a122b
+
0a122b
+    memset(misc->slot_hotplug_enable, 0xff,
0a122b
+           DIV_ROUND_UP(PCI_SLOT_MAX, BITS_PER_BYTE));
0a122b
+
0a122b
+    for (i = 0; i < ARRAY_SIZE(bus->devices); ++i) {
0a122b
+        PCIDeviceClass *pc;
0a122b
+        PCIDevice *pdev = bus->devices[i];
0a122b
+
0a122b
+        if (!pdev) {
0a122b
+            continue;
0a122b
+        }
0a122b
+
0a122b
+        pc = PCI_DEVICE_GET_CLASS(pdev);
0a122b
+
0a122b
+        if (pc->no_hotplug) {
0a122b
+            int slot = PCI_SLOT(i);
0a122b
+
0a122b
+            clear_bit(slot, misc->slot_hotplug_enable);
0a122b
+        }
0a122b
+    }
0a122b
+}
0a122b
+
0a122b
+static void acpi_get_misc_info(AcpiMiscInfo *info)
0a122b
+{
0a122b
+    info->has_hpet = hpet_find();
0a122b
+    info->pvpanic_port = pvpanic_port();
0a122b
+}
0a122b
+
0a122b
+static void acpi_get_pci_info(PcPciInfo *info)
0a122b
+{
0a122b
+    Object *pci_host;
0a122b
+    bool ambiguous;
0a122b
+
0a122b
+    pci_host = object_resolve_path_type("", TYPE_PCI_HOST_BRIDGE, &ambiguous);
0a122b
+    g_assert(!ambiguous);
0a122b
+    g_assert(pci_host);
0a122b
+
0a122b
+    info->w32.begin = object_property_get_int(pci_host,
0a122b
+                                              PCI_HOST_PROP_PCI_HOLE_START,
0a122b
+                                              NULL);
0a122b
+    info->w32.end = object_property_get_int(pci_host,
0a122b
+                                            PCI_HOST_PROP_PCI_HOLE_END,
0a122b
+                                            NULL);
0a122b
+    info->w64.begin = object_property_get_int(pci_host,
0a122b
+                                              PCI_HOST_PROP_PCI_HOLE64_START,
0a122b
+                                              NULL);
0a122b
+    info->w64.end = object_property_get_int(pci_host,
0a122b
+                                            PCI_HOST_PROP_PCI_HOLE64_END,
0a122b
+                                            NULL);
0a122b
+}
0a122b
+
0a122b
+#define ACPI_BUILD_APPNAME  "Bochs"
0a122b
+#define ACPI_BUILD_APPNAME6 "BOCHS "
0a122b
+#define ACPI_BUILD_APPNAME4 "BXPC"
0a122b
+
0a122b
+#define ACPI_BUILD_DPRINTF(level, fmt, ...) do {} while (0)
0a122b
+
0a122b
+#define ACPI_BUILD_TABLE_FILE "etc/acpi/tables"
0a122b
+#define ACPI_BUILD_RSDP_FILE "etc/acpi/rsdp"
0a122b
+
0a122b
+static void
0a122b
+build_header(GArray *linker, GArray *table_data,
0a122b
+             AcpiTableHeader *h, uint32_t sig, int len, uint8_t rev)
0a122b
+{
0a122b
+    h->signature = cpu_to_le32(sig);
0a122b
+    h->length = cpu_to_le32(len);
0a122b
+    h->revision = rev;
0a122b
+    memcpy(h->oem_id, ACPI_BUILD_APPNAME6, 6);
0a122b
+    memcpy(h->oem_table_id, ACPI_BUILD_APPNAME4, 4);
0a122b
+    memcpy(h->oem_table_id + 4, (void *)&sig, 4);
0a122b
+    h->oem_revision = cpu_to_le32(1);
0a122b
+    memcpy(h->asl_compiler_id, ACPI_BUILD_APPNAME4, 4);
0a122b
+    h->asl_compiler_revision = cpu_to_le32(1);
0a122b
+    h->checksum = 0;
0a122b
+    /* Checksum to be filled in by Guest linker */
0a122b
+    bios_linker_loader_add_checksum(linker, ACPI_BUILD_TABLE_FILE,
0a122b
+                                    table_data->data, h, len, &h->checksum);
0a122b
+}
0a122b
+
0a122b
+static inline GArray *build_alloc_array(void)
0a122b
+{
0a122b
+        return g_array_new(false, true /* clear */, 1);
0a122b
+}
0a122b
+
0a122b
+static inline void build_free_array(GArray *array)
0a122b
+{
0a122b
+        g_array_free(array, true);
0a122b
+}
0a122b
+
0a122b
+static inline void build_prepend_byte(GArray *array, uint8_t val)
0a122b
+{
0a122b
+    g_array_prepend_val(array, val);
0a122b
+}
0a122b
+
0a122b
+static inline void build_append_byte(GArray *array, uint8_t val)
0a122b
+{
0a122b
+    g_array_append_val(array, val);
0a122b
+}
0a122b
+
0a122b
+static inline void build_append_array(GArray *array, GArray *val)
0a122b
+{
0a122b
+    g_array_append_vals(array, val->data, val->len);
0a122b
+}
0a122b
+
0a122b
+static void build_append_nameseg(GArray *array, const char *format, ...)
0a122b
+{
0a122b
+    GString *s = g_string_new("");
0a122b
+    va_list args;
0a122b
+
0a122b
+    va_start(args, format);
0a122b
+    g_string_vprintf(s, format, args);
0a122b
+    va_end(args);
0a122b
+
0a122b
+    assert(s->len == 4);
0a122b
+    g_array_append_vals(array, s->str, s->len);
0a122b
+    g_string_free(s, true);
0a122b
+}
0a122b
+
0a122b
+/* 5.4 Definition Block Encoding */
0a122b
+enum {
0a122b
+    PACKAGE_LENGTH_1BYTE_SHIFT = 6, /* Up to 63 - use extra 2 bits. */
0a122b
+    PACKAGE_LENGTH_2BYTE_SHIFT = 4,
0a122b
+    PACKAGE_LENGTH_3BYTE_SHIFT = 12,
0a122b
+    PACKAGE_LENGTH_4BYTE_SHIFT = 20,
0a122b
+};
0a122b
+
0a122b
+static void build_prepend_package_length(GArray *package, unsigned min_bytes)
0a122b
+{
0a122b
+    uint8_t byte;
0a122b
+    unsigned length = package->len;
0a122b
+    unsigned length_bytes;
0a122b
+
0a122b
+    if (length + 1 < (1 << PACKAGE_LENGTH_1BYTE_SHIFT)) {
0a122b
+        length_bytes = 1;
0a122b
+    } else if (length + 2 < (1 << PACKAGE_LENGTH_3BYTE_SHIFT)) {
0a122b
+        length_bytes = 2;
0a122b
+    } else if (length + 3 < (1 << PACKAGE_LENGTH_4BYTE_SHIFT)) {
0a122b
+        length_bytes = 3;
0a122b
+    } else {
0a122b
+        length_bytes = 4;
0a122b
+    }
0a122b
+
0a122b
+    /* Force length to at least min_bytes.
0a122b
+     * This wastes memory but that's how bios did it.
0a122b
+     */
0a122b
+    length_bytes = MAX(length_bytes, min_bytes);
0a122b
+
0a122b
+    /* PkgLength is the length of the inclusive length of the data. */
0a122b
+    length += length_bytes;
0a122b
+
0a122b
+    switch (length_bytes) {
0a122b
+    case 1:
0a122b
+        byte = length;
0a122b
+        build_prepend_byte(package, byte);
0a122b
+        return;
0a122b
+    case 4:
0a122b
+        byte = length >> PACKAGE_LENGTH_4BYTE_SHIFT;
0a122b
+        build_prepend_byte(package, byte);
0a122b
+        length &= (1 << PACKAGE_LENGTH_4BYTE_SHIFT) - 1;
0a122b
+        /* fall through */
0a122b
+    case 3:
0a122b
+        byte = length >> PACKAGE_LENGTH_3BYTE_SHIFT;
0a122b
+        build_prepend_byte(package, byte);
0a122b
+        length &= (1 << PACKAGE_LENGTH_3BYTE_SHIFT) - 1;
0a122b
+        /* fall through */
0a122b
+    case 2:
0a122b
+        byte = length >> PACKAGE_LENGTH_2BYTE_SHIFT;
0a122b
+        build_prepend_byte(package, byte);
0a122b
+        length &= (1 << PACKAGE_LENGTH_2BYTE_SHIFT) - 1;
0a122b
+        /* fall through */
0a122b
+    }
0a122b
+    /*
0a122b
+     * Most significant two bits of byte zero indicate how many following bytes
0a122b
+     * are in PkgLength encoding.
0a122b
+     */
0a122b
+    byte = ((length_bytes - 1) << PACKAGE_LENGTH_1BYTE_SHIFT) | length;
0a122b
+    build_prepend_byte(package, byte);
0a122b
+}
0a122b
+
0a122b
+static void build_package(GArray *package, uint8_t op, unsigned min_bytes)
0a122b
+{
0a122b
+    build_prepend_package_length(package, min_bytes);
0a122b
+    build_prepend_byte(package, op);
0a122b
+}
0a122b
+
0a122b
+static void build_append_value(GArray *table, uint32_t value, int size)
0a122b
+{
0a122b
+    uint8_t prefix;
0a122b
+    int i;
0a122b
+
0a122b
+    switch (size) {
0a122b
+    case 1:
0a122b
+        prefix = 0x0A; /* BytePrefix */
0a122b
+        break;
0a122b
+    case 2:
0a122b
+        prefix = 0x0B; /* WordPrefix */
0a122b
+        break;
0a122b
+    case 4:
0a122b
+        prefix = 0x0C; /* DWordPrefix */
0a122b
+        break;
0a122b
+    default:
0a122b
+        assert(0);
0a122b
+        return;
0a122b
+    }
0a122b
+    build_append_byte(table, prefix);
0a122b
+    for (i = 0; i < size; ++i) {
0a122b
+        build_append_byte(table, value & 0xFF);
0a122b
+        value = value >> 8;
0a122b
+    }
0a122b
+}
0a122b
+
0a122b
+static void build_append_notify_target(GArray *method, GArray *target_name,
0a122b
+                                       uint32_t value, int size)
0a122b
+{
0a122b
+    GArray *notify = build_alloc_array();
0a122b
+    uint8_t op = 0xA0; /* IfOp */
0a122b
+
0a122b
+    build_append_byte(notify, 0x93); /* LEqualOp */
0a122b
+    build_append_byte(notify, 0x68); /* Arg0Op */
0a122b
+    build_append_value(notify, value, size);
0a122b
+    build_append_byte(notify, 0x86); /* NotifyOp */
0a122b
+    build_append_array(notify, target_name);
0a122b
+    build_append_byte(notify, 0x69); /* Arg1Op */
0a122b
+
0a122b
+    /* Pack it up */
0a122b
+    build_package(notify, op, 1);
0a122b
+
0a122b
+    build_append_array(method, notify);
0a122b
+
0a122b
+    build_free_array(notify);
0a122b
+}
0a122b
+
0a122b
+#define ACPI_PORT_SMI_CMD           0x00b2 /* TODO: this is APM_CNT_IOPORT */
0a122b
+
0a122b
+static inline void *acpi_data_push(GArray *table_data, unsigned size)
0a122b
+{
0a122b
+    unsigned off = table_data->len;
0a122b
+    g_array_set_size(table_data, off + size);
0a122b
+    return table_data->data + off;
0a122b
+}
0a122b
+
0a122b
+static unsigned acpi_data_len(GArray *table)
0a122b
+{
0a122b
+    return table->len * g_array_get_element_size(table);
0a122b
+}
0a122b
+
0a122b
+static void acpi_align_size(GArray *blob, unsigned align)
0a122b
+{
0a122b
+    /* Align size to multiple of given size. This reduces the chance
0a122b
+     * we need to change size in the future (breaking cross version migration).
0a122b
+     */
0a122b
+    g_array_set_size(blob, (ROUND_UP(acpi_data_len(blob), align) +
0a122b
+                            g_array_get_element_size(blob) - 1) /
0a122b
+                             g_array_get_element_size(blob));
0a122b
+}
0a122b
+
0a122b
+/* Get pointer within table in a safe manner */
0a122b
+#define ACPI_BUILD_PTR(table, size, off, type) \
0a122b
+    ((type *)(acpi_data_get_ptr(table, size, off, sizeof(type))))
0a122b
+
0a122b
+static inline void *acpi_data_get_ptr(uint8_t *table_data, unsigned table_size,
0a122b
+                                      unsigned off, unsigned size)
0a122b
+{
0a122b
+    assert(off + size > off);
0a122b
+    assert(off + size <= table_size);
0a122b
+    return table_data + off;
0a122b
+}
0a122b
+
0a122b
+static inline void acpi_add_table(GArray *table_offsets, GArray *table_data)
0a122b
+{
0a122b
+    uint32_t offset = cpu_to_le32(table_data->len);
0a122b
+    g_array_append_val(table_offsets, offset);
0a122b
+}
0a122b
+
0a122b
+/* FACS */
0a122b
+static void
0a122b
+build_facs(GArray *table_data, GArray *linker, PcGuestInfo *guest_info)
0a122b
+{
0a122b
+    AcpiFacsDescriptorRev1 *facs = acpi_data_push(table_data, sizeof *facs);
0a122b
+    facs->signature = cpu_to_le32(ACPI_FACS_SIGNATURE);
0a122b
+    facs->length = cpu_to_le32(sizeof(*facs));
0a122b
+}
0a122b
+
0a122b
+/* Load chipset information in FADT */
0a122b
+static void fadt_setup(AcpiFadtDescriptorRev1 *fadt, AcpiPmInfo *pm)
0a122b
+{
0a122b
+    fadt->model = 1;
0a122b
+    fadt->reserved1 = 0;
0a122b
+    fadt->sci_int = cpu_to_le16(pm->sci_int);
0a122b
+    fadt->smi_cmd = cpu_to_le32(ACPI_PORT_SMI_CMD);
0a122b
+    fadt->acpi_enable = pm->acpi_enable_cmd;
0a122b
+    fadt->acpi_disable = pm->acpi_disable_cmd;
0a122b
+    /* EVT, CNT, TMR offset matches hw/acpi/core.c */
0a122b
+    fadt->pm1a_evt_blk = cpu_to_le32(pm->io_base);
0a122b
+    fadt->pm1a_cnt_blk = cpu_to_le32(pm->io_base + 0x04);
0a122b
+    fadt->pm_tmr_blk = cpu_to_le32(pm->io_base + 0x08);
0a122b
+    fadt->gpe0_blk = cpu_to_le32(pm->gpe0_blk);
0a122b
+    /* EVT, CNT, TMR length matches hw/acpi/core.c */
0a122b
+    fadt->pm1_evt_len = 4;
0a122b
+    fadt->pm1_cnt_len = 2;
0a122b
+    fadt->pm_tmr_len = 4;
0a122b
+    fadt->gpe0_blk_len = pm->gpe0_blk_len;
0a122b
+    fadt->plvl2_lat = cpu_to_le16(0xfff); /* C2 state not supported */
0a122b
+    fadt->plvl3_lat = cpu_to_le16(0xfff); /* C3 state not supported */
0a122b
+    fadt->flags = cpu_to_le32((1 << ACPI_FADT_F_WBINVD) |
0a122b
+                              (1 << ACPI_FADT_F_PROC_C1) |
0a122b
+                              (1 << ACPI_FADT_F_SLP_BUTTON) |
0a122b
+                              (1 << ACPI_FADT_F_RTC_S4));
0a122b
+    fadt->flags |= cpu_to_le32(1 << ACPI_FADT_F_USE_PLATFORM_CLOCK);
0a122b
+}
0a122b
+
0a122b
+
0a122b
+/* FADT */
0a122b
+static void
0a122b
+build_fadt(GArray *table_data, GArray *linker, AcpiPmInfo *pm,
0a122b
+           unsigned facs, unsigned dsdt)
0a122b
+{
0a122b
+    AcpiFadtDescriptorRev1 *fadt = acpi_data_push(table_data, sizeof(*fadt));
0a122b
+
0a122b
+    fadt->firmware_ctrl = cpu_to_le32(facs);
0a122b
+    /* FACS address to be filled by Guest linker */
0a122b
+    bios_linker_loader_add_pointer(linker, ACPI_BUILD_TABLE_FILE,
0a122b
+                                   ACPI_BUILD_TABLE_FILE,
0a122b
+                                   table_data, &fadt->firmware_ctrl,
0a122b
+                                   sizeof fadt->firmware_ctrl);
0a122b
+
0a122b
+    fadt->dsdt = cpu_to_le32(dsdt);
0a122b
+    /* DSDT address to be filled by Guest linker */
0a122b
+    bios_linker_loader_add_pointer(linker, ACPI_BUILD_TABLE_FILE,
0a122b
+                                   ACPI_BUILD_TABLE_FILE,
0a122b
+                                   table_data, &fadt->dsdt,
0a122b
+                                   sizeof fadt->dsdt);
0a122b
+
0a122b
+    fadt_setup(fadt, pm);
0a122b
+
0a122b
+    build_header(linker, table_data,
0a122b
+                 (void *)fadt, ACPI_FACP_SIGNATURE, sizeof(*fadt), 1);
0a122b
+}
0a122b
+
0a122b
+static void
0a122b
+build_madt(GArray *table_data, GArray *linker, AcpiCpuInfo *cpu,
0a122b
+           PcGuestInfo *guest_info)
0a122b
+{
0a122b
+    int madt_start = table_data->len;
0a122b
+
0a122b
+    AcpiMultipleApicTable *madt;
0a122b
+    AcpiMadtIoApic *io_apic;
0a122b
+    AcpiMadtIntsrcovr *intsrcovr;
0a122b
+    AcpiMadtLocalNmi *local_nmi;
0a122b
+    int i;
0a122b
+
0a122b
+    madt = acpi_data_push(table_data, sizeof *madt);
0a122b
+    madt->local_apic_address = cpu_to_le32(APIC_DEFAULT_ADDRESS);
0a122b
+    madt->flags = cpu_to_le32(1);
0a122b
+
0a122b
+    for (i = 0; i < guest_info->apic_id_limit; i++) {
0a122b
+        AcpiMadtProcessorApic *apic = acpi_data_push(table_data, sizeof *apic);
0a122b
+        apic->type = ACPI_APIC_PROCESSOR;
0a122b
+        apic->length = sizeof(*apic);
0a122b
+        apic->processor_id = i;
0a122b
+        apic->local_apic_id = i;
0a122b
+        if (test_bit(i, cpu->found_cpus)) {
0a122b
+            apic->flags = cpu_to_le32(1);
0a122b
+        } else {
0a122b
+            apic->flags = cpu_to_le32(0);
0a122b
+        }
0a122b
+    }
0a122b
+    io_apic = acpi_data_push(table_data, sizeof *io_apic);
0a122b
+    io_apic->type = ACPI_APIC_IO;
0a122b
+    io_apic->length = sizeof(*io_apic);
0a122b
+#define ACPI_BUILD_IOAPIC_ID 0x0
0a122b
+    io_apic->io_apic_id = ACPI_BUILD_IOAPIC_ID;
0a122b
+    io_apic->address = cpu_to_le32(IO_APIC_DEFAULT_ADDRESS);
0a122b
+    io_apic->interrupt = cpu_to_le32(0);
0a122b
+
0a122b
+    if (guest_info->apic_xrupt_override) {
0a122b
+        intsrcovr = acpi_data_push(table_data, sizeof *intsrcovr);
0a122b
+        intsrcovr->type   = ACPI_APIC_XRUPT_OVERRIDE;
0a122b
+        intsrcovr->length = sizeof(*intsrcovr);
0a122b
+        intsrcovr->source = 0;
0a122b
+        intsrcovr->gsi    = cpu_to_le32(2);
0a122b
+        intsrcovr->flags  = cpu_to_le16(0); /* conforms to bus specifications */
0a122b
+    }
0a122b
+    for (i = 1; i < 16; i++) {
0a122b
+#define ACPI_BUILD_PCI_IRQS ((1<<5) | (1<<9) | (1<<10) | (1<<11))
0a122b
+        if (!(ACPI_BUILD_PCI_IRQS & (1 << i))) {
0a122b
+            /* No need for a INT source override structure. */
0a122b
+            continue;
0a122b
+        }
0a122b
+        intsrcovr = acpi_data_push(table_data, sizeof *intsrcovr);
0a122b
+        intsrcovr->type   = ACPI_APIC_XRUPT_OVERRIDE;
0a122b
+        intsrcovr->length = sizeof(*intsrcovr);
0a122b
+        intsrcovr->source = i;
0a122b
+        intsrcovr->gsi    = cpu_to_le32(i);
0a122b
+        intsrcovr->flags  = cpu_to_le16(0xd); /* active high, level triggered */
0a122b
+    }
0a122b
+
0a122b
+    local_nmi = acpi_data_push(table_data, sizeof *local_nmi);
0a122b
+    local_nmi->type         = ACPI_APIC_LOCAL_NMI;
0a122b
+    local_nmi->length       = sizeof(*local_nmi);
0a122b
+    local_nmi->processor_id = 0xff; /* all processors */
0a122b
+    local_nmi->flags        = cpu_to_le16(0);
0a122b
+    local_nmi->lint         = 1; /* ACPI_LINT1 */
0a122b
+
0a122b
+    build_header(linker, table_data,
0a122b
+                 (void *)(table_data->data + madt_start), ACPI_APIC_SIGNATURE,
0a122b
+                 table_data->len - madt_start, 1);
0a122b
+}
0a122b
+
0a122b
+/* Encode a hex value */
0a122b
+static inline char acpi_get_hex(uint32_t val)
0a122b
+{
0a122b
+    val &= 0x0f;
0a122b
+    return (val <= 9) ? ('0' + val) : ('A' + val - 10);
0a122b
+}
0a122b
+
0a122b
+#include "hw/i386/ssdt-proc.hex"
0a122b
+
0a122b
+/* 0x5B 0x83 ProcessorOp PkgLength NameString ProcID */
0a122b
+#define ACPI_PROC_OFFSET_CPUHEX (*ssdt_proc_name - *ssdt_proc_start + 2)
0a122b
+#define ACPI_PROC_OFFSET_CPUID1 (*ssdt_proc_name - *ssdt_proc_start + 4)
0a122b
+#define ACPI_PROC_OFFSET_CPUID2 (*ssdt_proc_id - *ssdt_proc_start)
0a122b
+#define ACPI_PROC_SIZEOF (*ssdt_proc_end - *ssdt_proc_start)
0a122b
+#define ACPI_PROC_AML (ssdp_proc_aml + *ssdt_proc_start)
0a122b
+
0a122b
+/* 0x5B 0x82 DeviceOp PkgLength NameString */
0a122b
+#define ACPI_PCIHP_OFFSET_HEX (*ssdt_pcihp_name - *ssdt_pcihp_start + 1)
0a122b
+#define ACPI_PCIHP_OFFSET_ID (*ssdt_pcihp_id - *ssdt_pcihp_start)
0a122b
+#define ACPI_PCIHP_OFFSET_ADR (*ssdt_pcihp_adr - *ssdt_pcihp_start)
0a122b
+#define ACPI_PCIHP_OFFSET_EJ0 (*ssdt_pcihp_ej0 - *ssdt_pcihp_start)
0a122b
+#define ACPI_PCIHP_SIZEOF (*ssdt_pcihp_end - *ssdt_pcihp_start)
0a122b
+#define ACPI_PCIHP_AML (ssdp_pcihp_aml + *ssdt_pcihp_start)
0a122b
+
0a122b
+#define ACPI_SSDT_SIGNATURE 0x54445353 /* SSDT */
0a122b
+#define ACPI_SSDT_HEADER_LENGTH 36
0a122b
+
0a122b
+#include "hw/i386/ssdt-misc.hex"
0a122b
+#include "hw/i386/ssdt-pcihp.hex"
0a122b
+
0a122b
+static void
0a122b
+build_append_notify(GArray *device, const char *name,
0a122b
+                    const char *format, int skip, int count)
0a122b
+{
0a122b
+    int i;
0a122b
+    GArray *method = build_alloc_array();
0a122b
+    uint8_t op = 0x14; /* MethodOp */
0a122b
+
0a122b
+    build_append_nameseg(method, name);
0a122b
+    build_append_byte(method, 0x02); /* MethodFlags: ArgCount */
0a122b
+    for (i = skip; i < count; i++) {
0a122b
+        GArray *target = build_alloc_array();
0a122b
+        build_append_nameseg(target, format, i);
0a122b
+        assert(i < 256); /* Fits in 1 byte */
0a122b
+        build_append_notify_target(method, target, i, 1);
0a122b
+        build_free_array(target);
0a122b
+    }
0a122b
+    build_package(method, op, 2);
0a122b
+
0a122b
+    build_append_array(device, method);
0a122b
+    build_free_array(method);
0a122b
+}
0a122b
+
0a122b
+static void patch_pcihp(int slot, uint8_t *ssdt_ptr, uint32_t eject)
0a122b
+{
0a122b
+    ssdt_ptr[ACPI_PCIHP_OFFSET_HEX] = acpi_get_hex(slot >> 4);
0a122b
+    ssdt_ptr[ACPI_PCIHP_OFFSET_HEX + 1] = acpi_get_hex(slot);
0a122b
+    ssdt_ptr[ACPI_PCIHP_OFFSET_ID] = slot;
0a122b
+    ssdt_ptr[ACPI_PCIHP_OFFSET_ADR + 2] = slot;
0a122b
+
0a122b
+    /* Runtime patching of ACPI_EJ0: to disable hotplug for a slot,
0a122b
+     * replace the method name: _EJ0 by ACPI_EJ0_.
0a122b
+     */
0a122b
+    /* Sanity check */
0a122b
+    assert(!memcmp(ssdt_ptr + ACPI_PCIHP_OFFSET_EJ0, "_EJ0", 4));
0a122b
+
0a122b
+    if (!eject) {
0a122b
+        memcpy(ssdt_ptr + ACPI_PCIHP_OFFSET_EJ0, "EJ0_", 4);
0a122b
+    }
0a122b
+}
0a122b
+
0a122b
+static void patch_pci_windows(PcPciInfo *pci, uint8_t *start, unsigned size)
0a122b
+{
0a122b
+    *ACPI_BUILD_PTR(start, size, acpi_pci32_start[0], uint32_t) =
0a122b
+        cpu_to_le32(pci->w32.begin);
0a122b
+
0a122b
+    *ACPI_BUILD_PTR(start, size, acpi_pci32_end[0], uint32_t) =
0a122b
+        cpu_to_le32(pci->w32.end - 1);
0a122b
+
0a122b
+    if (pci->w64.end || pci->w64.begin) {
0a122b
+        *ACPI_BUILD_PTR(start, size, acpi_pci64_valid[0], uint8_t) = 1;
0a122b
+        *ACPI_BUILD_PTR(start, size, acpi_pci64_start[0], uint64_t) =
0a122b
+            cpu_to_le64(pci->w64.begin);
0a122b
+        *ACPI_BUILD_PTR(start, size, acpi_pci64_end[0], uint64_t) =
0a122b
+            cpu_to_le64(pci->w64.end - 1);
0a122b
+        *ACPI_BUILD_PTR(start, size, acpi_pci64_length[0], uint64_t) =
0a122b
+            cpu_to_le64(pci->w64.end - pci->w64.begin);
0a122b
+    } else {
0a122b
+        *ACPI_BUILD_PTR(start, size, acpi_pci64_valid[0], uint8_t) = 0;
0a122b
+    }
0a122b
+}
0a122b
+
0a122b
+static void
0a122b
+build_ssdt(GArray *table_data, GArray *linker,
0a122b
+           AcpiCpuInfo *cpu, AcpiPmInfo *pm, AcpiMiscInfo *misc,
0a122b
+           PcPciInfo *pci, PcGuestInfo *guest_info)
0a122b
+{
0a122b
+    int acpi_cpus = MIN(0xff, guest_info->apic_id_limit);
0a122b
+    int ssdt_start = table_data->len;
0a122b
+    uint8_t *ssdt_ptr;
0a122b
+    int i;
0a122b
+
0a122b
+    /* Copy header and patch values in the S3_ / S4_ / S5_ packages */
0a122b
+    ssdt_ptr = acpi_data_push(table_data, sizeof(ssdp_misc_aml));
0a122b
+    memcpy(ssdt_ptr, ssdp_misc_aml, sizeof(ssdp_misc_aml));
0a122b
+    if (pm->s3_disabled) {
0a122b
+        ssdt_ptr[acpi_s3_name[0]] = 'X';
0a122b
+    }
0a122b
+    if (pm->s4_disabled) {
0a122b
+        ssdt_ptr[acpi_s4_name[0]] = 'X';
0a122b
+    } else {
0a122b
+        ssdt_ptr[acpi_s4_pkg[0] + 1] = ssdt_ptr[acpi_s4_pkg[0] + 3] =
0a122b
+            pm->s4_val;
0a122b
+    }
0a122b
+
0a122b
+    patch_pci_windows(pci, ssdt_ptr, sizeof(ssdp_misc_aml));
0a122b
+
0a122b
+    *(uint16_t *)(ssdt_ptr + *ssdt_isa_pest) =
0a122b
+        cpu_to_le16(misc->pvpanic_port);
0a122b
+
0a122b
+    {
0a122b
+        GArray *sb_scope = build_alloc_array();
0a122b
+        uint8_t op = 0x10; /* ScopeOp */
0a122b
+
0a122b
+        build_append_nameseg(sb_scope, "_SB_");
0a122b
+
0a122b
+        /* build Processor object for each processor */
0a122b
+        for (i = 0; i < acpi_cpus; i++) {
0a122b
+            uint8_t *proc = acpi_data_push(sb_scope, ACPI_PROC_SIZEOF);
0a122b
+            memcpy(proc, ACPI_PROC_AML, ACPI_PROC_SIZEOF);
0a122b
+            proc[ACPI_PROC_OFFSET_CPUHEX] = acpi_get_hex(i >> 4);
0a122b
+            proc[ACPI_PROC_OFFSET_CPUHEX+1] = acpi_get_hex(i);
0a122b
+            proc[ACPI_PROC_OFFSET_CPUID1] = i;
0a122b
+            proc[ACPI_PROC_OFFSET_CPUID2] = i;
0a122b
+        }
0a122b
+
0a122b
+        /* build this code:
0a122b
+         *   Method(NTFY, 2) {If (LEqual(Arg0, 0x00)) {Notify(CP00, Arg1)} ...}
0a122b
+         */
0a122b
+        /* Arg0 = Processor ID = APIC ID */
0a122b
+        build_append_notify(sb_scope, "NTFY", "CP%0.02X", 0, acpi_cpus);
0a122b
+
0a122b
+        /* build "Name(CPON, Package() { One, One, ..., Zero, Zero, ... })" */
0a122b
+        build_append_byte(sb_scope, 0x08); /* NameOp */
0a122b
+        build_append_nameseg(sb_scope, "CPON");
0a122b
+
0a122b
+        {
0a122b
+            GArray *package = build_alloc_array();
0a122b
+            uint8_t op = 0x12; /* PackageOp */
0a122b
+
0a122b
+            build_append_byte(package, acpi_cpus); /* NumElements */
0a122b
+            for (i = 0; i < acpi_cpus; i++) {
0a122b
+                uint8_t b = test_bit(i, cpu->found_cpus) ? 0x01 : 0x00;
0a122b
+                build_append_byte(package, b);
0a122b
+            }
0a122b
+
0a122b
+            build_package(package, op, 2);
0a122b
+            build_append_array(sb_scope, package);
0a122b
+            build_free_array(package);
0a122b
+        }
0a122b
+
0a122b
+        {
0a122b
+            GArray *pci0 = build_alloc_array();
0a122b
+            uint8_t op = 0x10; /* ScopeOp */;
0a122b
+
0a122b
+            build_append_nameseg(pci0, "PCI0");
0a122b
+
0a122b
+            /* build Device object for each slot */
0a122b
+            for (i = 1; i < PCI_SLOT_MAX; i++) {
0a122b
+                bool eject = test_bit(i, misc->slot_hotplug_enable);
0a122b
+                void *pcihp = acpi_data_push(pci0, ACPI_PCIHP_SIZEOF);
0a122b
+
0a122b
+                memcpy(pcihp, ACPI_PCIHP_AML, ACPI_PCIHP_SIZEOF);
0a122b
+                patch_pcihp(i, pcihp, eject);
0a122b
+            }
0a122b
+
0a122b
+            build_append_notify(pci0, "PCNT", "S%0.02X_", 1, PCI_SLOT_MAX);
0a122b
+            build_package(pci0, op, 3);
0a122b
+            build_append_array(sb_scope, pci0);
0a122b
+            build_free_array(pci0);
0a122b
+        }
0a122b
+
0a122b
+        build_package(sb_scope, op, 3);
0a122b
+        build_append_array(table_data, sb_scope);
0a122b
+        build_free_array(sb_scope);
0a122b
+    }
0a122b
+
0a122b
+    build_header(linker, table_data,
0a122b
+                 (void *)(table_data->data + ssdt_start),
0a122b
+                 ACPI_SSDT_SIGNATURE, table_data->len - ssdt_start, 1);
0a122b
+}
0a122b
+
0a122b
+static void
0a122b
+build_hpet(GArray *table_data, GArray *linker)
0a122b
+{
0a122b
+    Acpi20Hpet *hpet;
0a122b
+
0a122b
+    hpet = acpi_data_push(table_data, sizeof(*hpet));
0a122b
+    /* Note timer_block_id value must be kept in sync with value advertised by
0a122b
+     * emulated hpet
0a122b
+     */
0a122b
+    hpet->timer_block_id = cpu_to_le32(0x8086a201);
0a122b
+    hpet->addr.address = cpu_to_le64(HPET_BASE);
0a122b
+    build_header(linker, table_data,
0a122b
+                 (void *)hpet, ACPI_HPET_SIGNATURE, sizeof(*hpet), 1);
0a122b
+}
0a122b
+
0a122b
+static void
0a122b
+acpi_build_srat_memory(AcpiSratMemoryAffinity *numamem,
0a122b
+                       uint64_t base, uint64_t len, int node, int enabled)
0a122b
+{
0a122b
+    numamem->type = ACPI_SRAT_MEMORY;
0a122b
+    numamem->length = sizeof(*numamem);
0a122b
+    memset(numamem->proximity, 0, 4);
0a122b
+    numamem->proximity[0] = node;
0a122b
+    numamem->flags = cpu_to_le32(!!enabled);
0a122b
+    numamem->base_addr = cpu_to_le64(base);
0a122b
+    numamem->range_length = cpu_to_le64(len);
0a122b
+}
0a122b
+
0a122b
+static void
0a122b
+build_srat(GArray *table_data, GArray *linker,
0a122b
+           AcpiCpuInfo *cpu, PcGuestInfo *guest_info)
0a122b
+{
0a122b
+    AcpiSystemResourceAffinityTable *srat;
0a122b
+    AcpiSratProcessorAffinity *core;
0a122b
+    AcpiSratMemoryAffinity *numamem;
0a122b
+
0a122b
+    int i;
0a122b
+    uint64_t curnode;
0a122b
+    int srat_start, numa_start, slots;
0a122b
+    uint64_t mem_len, mem_base, next_base;
0a122b
+
0a122b
+    srat_start = table_data->len;
0a122b
+
0a122b
+    srat = acpi_data_push(table_data, sizeof *srat);
0a122b
+    srat->reserved1 = cpu_to_le32(1);
0a122b
+    core = (void *)(srat + 1);
0a122b
+
0a122b
+    for (i = 0; i < guest_info->apic_id_limit; ++i) {
0a122b
+        core = acpi_data_push(table_data, sizeof *core);
0a122b
+        core->type = ACPI_SRAT_PROCESSOR;
0a122b
+        core->length = sizeof(*core);
0a122b
+        core->local_apic_id = i;
0a122b
+        curnode = guest_info->node_cpu[i];
0a122b
+        core->proximity_lo = curnode;
0a122b
+        memset(core->proximity_hi, 0, 3);
0a122b
+        core->local_sapic_eid = 0;
0a122b
+        if (test_bit(i, cpu->found_cpus)) {
0a122b
+            core->flags = cpu_to_le32(1);
0a122b
+        } else {
0a122b
+            core->flags = cpu_to_le32(0);
0a122b
+        }
0a122b
+    }
0a122b
+
0a122b
+
0a122b
+    /* the memory map is a bit tricky, it contains at least one hole
0a122b
+     * from 640k-1M and possibly another one from 3.5G-4G.
0a122b
+     */
0a122b
+    next_base = 0;
0a122b
+    numa_start = table_data->len;
0a122b
+
0a122b
+    numamem = acpi_data_push(table_data, sizeof *numamem);
0a122b
+    acpi_build_srat_memory(numamem, 0, 640*1024, 0, 1);
0a122b
+    next_base = 1024 * 1024;
0a122b
+    for (i = 1; i < guest_info->numa_nodes + 1; ++i) {
0a122b
+        mem_base = next_base;
0a122b
+        mem_len = guest_info->node_mem[i - 1];
0a122b
+        if (i == 1) {
0a122b
+            mem_len -= 1024 * 1024;
0a122b
+        }
0a122b
+        next_base = mem_base + mem_len;
0a122b
+
0a122b
+        /* Cut out the ACPI_PCI hole */
0a122b
+        if (mem_base <= guest_info->ram_size &&
0a122b
+            next_base > guest_info->ram_size) {
0a122b
+            mem_len -= next_base - guest_info->ram_size;
0a122b
+            if (mem_len > 0) {
0a122b
+                numamem = acpi_data_push(table_data, sizeof *numamem);
0a122b
+                acpi_build_srat_memory(numamem, mem_base, mem_len, i-1, 1);
0a122b
+            }
0a122b
+            mem_base = 1ULL << 32;
0a122b
+            mem_len = next_base - guest_info->ram_size;
0a122b
+            next_base += (1ULL << 32) - guest_info->ram_size;
0a122b
+        }
0a122b
+        numamem = acpi_data_push(table_data, sizeof *numamem);
0a122b
+        acpi_build_srat_memory(numamem, mem_base, mem_len, i - 1, 1);
0a122b
+    }
0a122b
+    slots = (table_data->len - numa_start) / sizeof *numamem;
0a122b
+    for (; slots < guest_info->numa_nodes + 2; slots++) {
0a122b
+        numamem = acpi_data_push(table_data, sizeof *numamem);
0a122b
+        acpi_build_srat_memory(numamem, 0, 0, 0, 0);
0a122b
+    }
0a122b
+
0a122b
+    build_header(linker, table_data,
0a122b
+                 (void *)(table_data->data + srat_start),
0a122b
+                 ACPI_SRAT_SIGNATURE,
0a122b
+                 table_data->len - srat_start, 1);
0a122b
+}
0a122b
+
0a122b
+static void
0a122b
+build_mcfg_q35(GArray *table_data, GArray *linker, AcpiMcfgInfo *info)
0a122b
+{
0a122b
+    AcpiTableMcfg *mcfg;
0a122b
+    uint32_t sig;
0a122b
+    int len = sizeof(*mcfg) + 1 * sizeof(mcfg->allocation[0]);
0a122b
+
0a122b
+    mcfg = acpi_data_push(table_data, len);
0a122b
+    mcfg->allocation[0].address = cpu_to_le64(info->mcfg_base);
0a122b
+    /* Only a single allocation so no need to play with segments */
0a122b
+    mcfg->allocation[0].pci_segment = cpu_to_le16(0);
0a122b
+    mcfg->allocation[0].start_bus_number = 0;
0a122b
+    mcfg->allocation[0].end_bus_number = PCIE_MMCFG_BUS(info->mcfg_size - 1);
0a122b
+
0a122b
+    /* MCFG is used for ECAM which can be enabled or disabled by guest.
0a122b
+     * To avoid table size changes (which create migration issues),
0a122b
+     * always create the table even if there are no allocations,
0a122b
+     * but set the signature to a reserved value in this case.
0a122b
+     * ACPI spec requires OSPMs to ignore such tables.
0a122b
+     */
0a122b
+    if (info->mcfg_base == PCIE_BASE_ADDR_UNMAPPED) {
0a122b
+        sig = ACPI_RSRV_SIGNATURE;
0a122b
+    } else {
0a122b
+        sig = ACPI_MCFG_SIGNATURE;
0a122b
+    }
0a122b
+    build_header(linker, table_data, (void *)mcfg, sig, len, 1);
0a122b
+}
0a122b
+
0a122b
+static void
0a122b
+build_dsdt(GArray *table_data, GArray *linker, AcpiMiscInfo *misc)
0a122b
+{
0a122b
+    void *dsdt;
0a122b
+    assert(misc->dsdt_code && misc->dsdt_size);
0a122b
+    dsdt = acpi_data_push(table_data, misc->dsdt_size);
0a122b
+    memcpy(dsdt, misc->dsdt_code, misc->dsdt_size);
0a122b
+}
0a122b
+
0a122b
+/* Build final rsdt table */
0a122b
+static void
0a122b
+build_rsdt(GArray *table_data, GArray *linker, GArray *table_offsets)
0a122b
+{
0a122b
+    AcpiRsdtDescriptorRev1 *rsdt;
0a122b
+    size_t rsdt_len;
0a122b
+    int i;
0a122b
+
0a122b
+    rsdt_len = sizeof(*rsdt) + sizeof(uint32_t) * table_offsets->len;
0a122b
+    rsdt = acpi_data_push(table_data, rsdt_len);
0a122b
+    memcpy(rsdt->table_offset_entry, table_offsets->data,
0a122b
+           sizeof(uint32_t) * table_offsets->len);
0a122b
+    for (i = 0; i < table_offsets->len; ++i) {
0a122b
+        /* rsdt->table_offset_entry to be filled by Guest linker */
0a122b
+        bios_linker_loader_add_pointer(linker,
0a122b
+                                       ACPI_BUILD_TABLE_FILE,
0a122b
+                                       ACPI_BUILD_TABLE_FILE,
0a122b
+                                       table_data, &rsdt->table_offset_entry[i],
0a122b
+                                       sizeof(uint32_t));
0a122b
+    }
0a122b
+    build_header(linker, table_data,
0a122b
+                 (void *)rsdt, ACPI_RSDT_SIGNATURE, rsdt_len, 1);
0a122b
+}
0a122b
+
0a122b
+static GArray *
0a122b
+build_rsdp(GArray *rsdp_table, GArray *linker, unsigned rsdt)
0a122b
+{
0a122b
+    AcpiRsdpDescriptor *rsdp = acpi_data_push(rsdp_table, sizeof *rsdp);
0a122b
+
0a122b
+    bios_linker_loader_alloc(linker, ACPI_BUILD_RSDP_FILE, 1,
0a122b
+                             true /* fseg memory */);
0a122b
+
0a122b
+    rsdp->signature = cpu_to_le64(ACPI_RSDP_SIGNATURE);
0a122b
+    memcpy(rsdp->oem_id, ACPI_BUILD_APPNAME6, 6);
0a122b
+    rsdp->rsdt_physical_address = cpu_to_le32(rsdt);
0a122b
+    /* Address to be filled by Guest linker */
0a122b
+    bios_linker_loader_add_pointer(linker, ACPI_BUILD_RSDP_FILE,
0a122b
+                                   ACPI_BUILD_TABLE_FILE,
0a122b
+                                   rsdp_table, &rsdp->rsdt_physical_address,
0a122b
+                                   sizeof rsdp->rsdt_physical_address);
0a122b
+    rsdp->checksum = 0;
0a122b
+    /* Checksum to be filled by Guest linker */
0a122b
+    bios_linker_loader_add_checksum(linker, ACPI_BUILD_RSDP_FILE,
0a122b
+                                    rsdp, rsdp, sizeof *rsdp, &rsdp->checksum);
0a122b
+
0a122b
+    return rsdp_table;
0a122b
+}
0a122b
+
0a122b
+typedef
0a122b
+struct AcpiBuildTables {
0a122b
+    GArray *table_data;
0a122b
+    GArray *rsdp;
0a122b
+    GArray *linker;
0a122b
+} AcpiBuildTables;
0a122b
+
0a122b
+static inline void acpi_build_tables_init(AcpiBuildTables *tables)
0a122b
+{
0a122b
+    tables->rsdp = g_array_new(false, true /* clear */, 1);
0a122b
+    tables->table_data = g_array_new(false, true /* clear */, 1);
0a122b
+    tables->linker = bios_linker_loader_init();
0a122b
+}
0a122b
+
0a122b
+static inline void acpi_build_tables_cleanup(AcpiBuildTables *tables, bool mfre)
0a122b
+{
0a122b
+    void *linker_data = bios_linker_loader_cleanup(tables->linker);
0a122b
+    if (mfre) {
0a122b
+        g_free(linker_data);
0a122b
+    }
0a122b
+    g_array_free(tables->rsdp, mfre);
0a122b
+    g_array_free(tables->table_data, mfre);
0a122b
+}
0a122b
+
0a122b
+typedef
0a122b
+struct AcpiBuildState {
0a122b
+    /* Copy of table in RAM (for patching). */
0a122b
+    uint8_t *table_ram;
0a122b
+    uint32_t table_size;
0a122b
+    /* Is table patched? */
0a122b
+    uint8_t patched;
0a122b
+    PcGuestInfo *guest_info;
0a122b
+} AcpiBuildState;
0a122b
+
0a122b
+static bool acpi_get_mcfg(AcpiMcfgInfo *mcfg)
0a122b
+{
0a122b
+    Object *pci_host;
0a122b
+    QObject *o;
0a122b
+    bool ambiguous;
0a122b
+
0a122b
+    pci_host = object_resolve_path_type("", TYPE_PCI_HOST_BRIDGE, &ambiguous);
0a122b
+    g_assert(!ambiguous);
0a122b
+    g_assert(pci_host);
0a122b
+
0a122b
+    o = object_property_get_qobject(pci_host, PCIE_HOST_MCFG_BASE, NULL);
0a122b
+    if (!o) {
0a122b
+        return false;
0a122b
+    }
0a122b
+    mcfg->mcfg_base = qint_get_int(qobject_to_qint(o));
0a122b
+
0a122b
+    o = object_property_get_qobject(pci_host, PCIE_HOST_MCFG_SIZE, NULL);
0a122b
+    assert(o);
0a122b
+    mcfg->mcfg_size = qint_get_int(qobject_to_qint(o));
0a122b
+    return true;
0a122b
+}
0a122b
+
0a122b
+static
0a122b
+void acpi_build(PcGuestInfo *guest_info, AcpiBuildTables *tables)
0a122b
+{
0a122b
+    GArray *table_offsets;
0a122b
+    unsigned facs, dsdt, rsdt;
0a122b
+    AcpiCpuInfo cpu;
0a122b
+    AcpiPmInfo pm;
0a122b
+    AcpiMiscInfo misc;
0a122b
+    AcpiMcfgInfo mcfg;
0a122b
+    PcPciInfo pci;
0a122b
+    uint8_t *u;
0a122b
+
0a122b
+    acpi_get_cpu_info(&cpu);
0a122b
+    acpi_get_pm_info(&pm);
0a122b
+    acpi_get_dsdt(&misc);
0a122b
+    acpi_get_hotplug_info(&misc);
0a122b
+    acpi_get_misc_info(&misc);
0a122b
+    acpi_get_pci_info(&pci;;
0a122b
+
0a122b
+    table_offsets = g_array_new(false, true /* clear */,
0a122b
+                                        sizeof(uint32_t));
0a122b
+    ACPI_BUILD_DPRINTF(3, "init ACPI tables\n");
0a122b
+
0a122b
+    bios_linker_loader_alloc(tables->linker, ACPI_BUILD_TABLE_FILE,
0a122b
+                             64 /* Ensure FACS is aligned */,
0a122b
+                             false /* high memory */);
0a122b
+
0a122b
+    /*
0a122b
+     * FACS is pointed to by FADT.
0a122b
+     * We place it first since it's the only table that has alignment
0a122b
+     * requirements.
0a122b
+     */
0a122b
+    facs = tables->table_data->len;
0a122b
+    build_facs(tables->table_data, tables->linker, guest_info);
0a122b
+
0a122b
+    /* DSDT is pointed to by FADT */
0a122b
+    dsdt = tables->table_data->len;
0a122b
+    build_dsdt(tables->table_data, tables->linker, &misc);
0a122b
+
0a122b
+    /* ACPI tables pointed to by RSDT */
0a122b
+    acpi_add_table(table_offsets, tables->table_data);
0a122b
+    build_fadt(tables->table_data, tables->linker, &pm, facs, dsdt);
0a122b
+    acpi_add_table(table_offsets, tables->table_data);
0a122b
+
0a122b
+    build_ssdt(tables->table_data, tables->linker, &cpu, &pm, &misc, &pci,
0a122b
+               guest_info);
0a122b
+    acpi_add_table(table_offsets, tables->table_data);
0a122b
+
0a122b
+    build_madt(tables->table_data, tables->linker, &cpu, guest_info);
0a122b
+    acpi_add_table(table_offsets, tables->table_data);
0a122b
+    if (misc.has_hpet) {
0a122b
+        build_hpet(tables->table_data, tables->linker);
0a122b
+    }
0a122b
+    if (guest_info->numa_nodes) {
0a122b
+        acpi_add_table(table_offsets, tables->table_data);
0a122b
+        build_srat(tables->table_data, tables->linker, &cpu, guest_info);
0a122b
+    }
0a122b
+    if (acpi_get_mcfg(&mcfg)) {
0a122b
+        acpi_add_table(table_offsets, tables->table_data);
0a122b
+        build_mcfg_q35(tables->table_data, tables->linker, &mcfg);
0a122b
+    }
0a122b
+
0a122b
+    /* Add tables supplied by user (if any) */
0a122b
+    for (u = acpi_table_first(); u; u = acpi_table_next(u)) {
0a122b
+        unsigned len = acpi_table_len(u);
0a122b
+
0a122b
+        acpi_add_table(table_offsets, tables->table_data);
0a122b
+        g_array_append_vals(tables->table_data, u, len);
0a122b
+    }
0a122b
+
0a122b
+    /* RSDT is pointed to by RSDP */
0a122b
+    rsdt = tables->table_data->len;
0a122b
+    build_rsdt(tables->table_data, tables->linker, table_offsets);
0a122b
+
0a122b
+    /* RSDP is in FSEG memory, so allocate it separately */
0a122b
+    build_rsdp(tables->rsdp, tables->linker, rsdt);
0a122b
+
0a122b
+    /* We'll expose it all to Guest so align size to reduce
0a122b
+     * chance of size changes.
0a122b
+     * RSDP is small so it's easy to keep it immutable, no need to
0a122b
+     * bother with alignment.
0a122b
+     */
0a122b
+    acpi_align_size(tables->table_data, 0x1000);
0a122b
+
0a122b
+    acpi_align_size(tables->linker, 0x1000);
0a122b
+
0a122b
+    /* Cleanup memory that's no longer used. */
0a122b
+    g_array_free(table_offsets, true);
0a122b
+}
0a122b
+
0a122b
+static void acpi_build_update(void *build_opaque, uint32_t offset)
0a122b
+{
0a122b
+    AcpiBuildState *build_state = build_opaque;
0a122b
+    AcpiBuildTables tables;
0a122b
+
0a122b
+    /* No state to update or already patched? Nothing to do. */
0a122b
+    if (!build_state || build_state->patched) {
0a122b
+        return;
0a122b
+    }
0a122b
+    build_state->patched = 1;
0a122b
+
0a122b
+    acpi_build_tables_init(&tables);
0a122b
+
0a122b
+    acpi_build(build_state->guest_info, &tables);
0a122b
+
0a122b
+    assert(acpi_data_len(tables.table_data) == build_state->table_size);
0a122b
+    memcpy(build_state->table_ram, tables.table_data->data,
0a122b
+           build_state->table_size);
0a122b
+
0a122b
+    acpi_build_tables_cleanup(&tables, true);
0a122b
+}
0a122b
+
0a122b
+static void acpi_build_reset(void *build_opaque)
0a122b
+{
0a122b
+    AcpiBuildState *build_state = build_opaque;
0a122b
+    build_state->patched = 0;
0a122b
+}
0a122b
+
0a122b
+static void *acpi_add_rom_blob(AcpiBuildState *build_state, GArray *blob,
0a122b
+                               const char *name)
0a122b
+{
0a122b
+    return rom_add_blob(name, blob->data, acpi_data_len(blob), -1, name,
0a122b
+                        acpi_build_update, build_state);
0a122b
+}
0a122b
+
0a122b
+static const VMStateDescription vmstate_acpi_build = {
0a122b
+    .name = "acpi_build",
0a122b
+    .version_id = 1,
0a122b
+    .minimum_version_id = 1,
0a122b
+    .minimum_version_id_old = 1,
0a122b
+    .fields      = (VMStateField[]) {
0a122b
+        VMSTATE_UINT8(patched, AcpiBuildState),
0a122b
+        VMSTATE_END_OF_LIST()
0a122b
+    },
0a122b
+};
0a122b
+
0a122b
+void acpi_setup(PcGuestInfo *guest_info)
0a122b
+{
0a122b
+    AcpiBuildTables tables;
0a122b
+    AcpiBuildState *build_state;
0a122b
+
0a122b
+    if (!guest_info->fw_cfg) {
0a122b
+        ACPI_BUILD_DPRINTF(3, "No fw cfg. Bailing out.\n");
0a122b
+        return;
0a122b
+    }
0a122b
+
0a122b
+    if (!guest_info->has_acpi_build) {
0a122b
+        ACPI_BUILD_DPRINTF(3, "ACPI build disabled. Bailing out.\n");
0a122b
+        return;
0a122b
+    }
0a122b
+
0a122b
+    build_state = g_malloc0(sizeof *build_state);
0a122b
+
0a122b
+    build_state->guest_info = guest_info;
0a122b
+
0a122b
+    acpi_build_tables_init(&tables);
0a122b
+    acpi_build(build_state->guest_info, &tables);
0a122b
+
0a122b
+    /* Now expose it all to Guest */
0a122b
+    build_state->table_ram = acpi_add_rom_blob(build_state, tables.table_data,
0a122b
+                                               ACPI_BUILD_TABLE_FILE);
0a122b
+    build_state->table_size = acpi_data_len(tables.table_data);
0a122b
+
0a122b
+    acpi_add_rom_blob(NULL, tables.linker, "etc/table-loader");
0a122b
+
0a122b
+    /*
0a122b
+     * RSDP is small so it's easy to keep it immutable, no need to
0a122b
+     * bother with ROM blobs.
0a122b
+     */
0a122b
+    fw_cfg_add_file(guest_info->fw_cfg, ACPI_BUILD_RSDP_FILE,
0a122b
+                    tables.rsdp->data, acpi_data_len(tables.rsdp));
0a122b
+
0a122b
+    qemu_register_reset(acpi_build_reset, build_state);
0a122b
+    acpi_build_reset(build_state);
0a122b
+    vmstate_register(NULL, 0, &vmstate_acpi_build, build_state);
0a122b
+
0a122b
+    /* Cleanup tables but don't free the memory: we track it
0a122b
+     * in build_state.
0a122b
+     */
0a122b
+    acpi_build_tables_cleanup(&tables, false);
0a122b
+}
0a122b
diff --git a/hw/i386/acpi-build.h b/hw/i386/acpi-build.h
0a122b
new file mode 100644
0a122b
index 0000000..e57b1aa
0a122b
--- /dev/null
0a122b
+++ b/hw/i386/acpi-build.h
0a122b
@@ -0,0 +1,9 @@
0a122b
+
0a122b
+#ifndef HW_I386_ACPI_BUILD_H
0a122b
+#define HW_I386_ACPI_BUILD_H
0a122b
+
0a122b
+#include "qemu/typedefs.h"
0a122b
+
0a122b
+void acpi_setup(PcGuestInfo *);
0a122b
+
0a122b
+#endif
0a122b
diff --git a/hw/i386/acpi-defs.h b/hw/i386/acpi-defs.h
0a122b
new file mode 100644
0a122b
index 0000000..78ca204
0a122b
--- /dev/null
0a122b
+++ b/hw/i386/acpi-defs.h
0a122b
@@ -0,0 +1,331 @@
0a122b
+/*
0a122b
+ * This program is free software; you can redistribute it and/or modify
0a122b
+ * it under the terms of the GNU General Public License as published by
0a122b
+ * the Free Software Foundation; either version 2 of the License, or
0a122b
+ * (at your option) any later version.
0a122b
+
0a122b
+ * This program is distributed in the hope that it will be useful,
0a122b
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
0a122b
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
0a122b
+ * GNU General Public License for more details.
0a122b
+
0a122b
+ * You should have received a copy of the GNU General Public License along
0a122b
+ * with this program; if not, see <http://www.gnu.org/licenses/>.
0a122b
+ */
0a122b
+#ifndef QEMU_ACPI_DEFS_H
0a122b
+#define QEMU_ACPI_DEFS_H
0a122b
+
0a122b
+enum {
0a122b
+    ACPI_FADT_F_WBINVD,
0a122b
+    ACPI_FADT_F_WBINVD_FLUSH,
0a122b
+    ACPI_FADT_F_PROC_C1,
0a122b
+    ACPI_FADT_F_P_LVL2_UP,
0a122b
+    ACPI_FADT_F_PWR_BUTTON,
0a122b
+    ACPI_FADT_F_SLP_BUTTON,
0a122b
+    ACPI_FADT_F_FIX_RTC,
0a122b
+    ACPI_FADT_F_RTC_S4,
0a122b
+    ACPI_FADT_F_TMR_VAL_EXT,
0a122b
+    ACPI_FADT_F_DCK_CAP,
0a122b
+    ACPI_FADT_F_RESET_REG_SUP,
0a122b
+    ACPI_FADT_F_SEALED_CASE,
0a122b
+    ACPI_FADT_F_HEADLESS,
0a122b
+    ACPI_FADT_F_CPU_SW_SLP,
0a122b
+    ACPI_FADT_F_PCI_EXP_WAK,
0a122b
+    ACPI_FADT_F_USE_PLATFORM_CLOCK,
0a122b
+    ACPI_FADT_F_S4_RTC_STS_VALID,
0a122b
+    ACPI_FADT_F_REMOTE_POWER_ON_CAPABLE,
0a122b
+    ACPI_FADT_F_FORCE_APIC_CLUSTER_MODEL,
0a122b
+    ACPI_FADT_F_FORCE_APIC_PHYSICAL_DESTINATION_MODE,
0a122b
+    ACPI_FADT_F_HW_REDUCED_ACPI,
0a122b
+    ACPI_FADT_F_LOW_POWER_S0_IDLE_CAPABLE,
0a122b
+};
0a122b
+
0a122b
+/*
0a122b
+ * ACPI 2.0 Generic Address Space definition.
0a122b
+ */
0a122b
+struct Acpi20GenericAddress {
0a122b
+    uint8_t  address_space_id;
0a122b
+    uint8_t  register_bit_width;
0a122b
+    uint8_t  register_bit_offset;
0a122b
+    uint8_t  reserved;
0a122b
+    uint64_t address;
0a122b
+} QEMU_PACKED;
0a122b
+typedef struct Acpi20GenericAddress Acpi20GenericAddress;
0a122b
+
0a122b
+#define ACPI_RSDP_SIGNATURE 0x2052545020445352LL // "RSD PTR "
0a122b
+
0a122b
+struct AcpiRsdpDescriptor {        /* Root System Descriptor Pointer */
0a122b
+    uint64_t signature;              /* ACPI signature, contains "RSD PTR " */
0a122b
+    uint8_t  checksum;               /* To make sum of struct == 0 */
0a122b
+    uint8_t  oem_id [6];             /* OEM identification */
0a122b
+    uint8_t  revision;               /* Must be 0 for 1.0, 2 for 2.0 */
0a122b
+    uint32_t rsdt_physical_address;  /* 32-bit physical address of RSDT */
0a122b
+    uint32_t length;                 /* XSDT Length in bytes including hdr */
0a122b
+    uint64_t xsdt_physical_address;  /* 64-bit physical address of XSDT */
0a122b
+    uint8_t  extended_checksum;      /* Checksum of entire table */
0a122b
+    uint8_t  reserved [3];           /* Reserved field must be 0 */
0a122b
+} QEMU_PACKED;
0a122b
+typedef struct AcpiRsdpDescriptor AcpiRsdpDescriptor;
0a122b
+
0a122b
+/* Table structure from Linux kernel (the ACPI tables are under the
0a122b
+   BSD license) */
0a122b
+
0a122b
+
0a122b
+#define ACPI_TABLE_HEADER_DEF   /* ACPI common table header */ \
0a122b
+    uint32_t signature;          /* ACPI signature (4 ASCII characters) */ \
0a122b
+    uint32_t length;                 /* Length of table, in bytes, including header */ \
0a122b
+    uint8_t  revision;               /* ACPI Specification minor version # */ \
0a122b
+    uint8_t  checksum;               /* To make sum of entire table == 0 */ \
0a122b
+    uint8_t  oem_id [6];             /* OEM identification */ \
0a122b
+    uint8_t  oem_table_id [8];       /* OEM table identification */ \
0a122b
+    uint32_t oem_revision;           /* OEM revision number */ \
0a122b
+    uint8_t  asl_compiler_id [4];    /* ASL compiler vendor ID */ \
0a122b
+    uint32_t asl_compiler_revision;  /* ASL compiler revision number */
0a122b
+
0a122b
+
0a122b
+struct AcpiTableHeader         /* ACPI common table header */
0a122b
+{
0a122b
+    ACPI_TABLE_HEADER_DEF
0a122b
+} QEMU_PACKED;
0a122b
+typedef struct AcpiTableHeader AcpiTableHeader;
0a122b
+
0a122b
+/*
0a122b
+ * ACPI 1.0 Fixed ACPI Description Table (FADT)
0a122b
+ */
0a122b
+#define ACPI_FACP_SIGNATURE 0x50434146 // FACP
0a122b
+struct AcpiFadtDescriptorRev1
0a122b
+{
0a122b
+    ACPI_TABLE_HEADER_DEF     /* ACPI common table header */
0a122b
+    uint32_t firmware_ctrl;          /* Physical address of FACS */
0a122b
+    uint32_t dsdt;                   /* Physical address of DSDT */
0a122b
+    uint8_t  model;                  /* System Interrupt Model */
0a122b
+    uint8_t  reserved1;              /* Reserved */
0a122b
+    uint16_t sci_int;                /* System vector of SCI interrupt */
0a122b
+    uint32_t smi_cmd;                /* Port address of SMI command port */
0a122b
+    uint8_t  acpi_enable;            /* Value to write to smi_cmd to enable ACPI */
0a122b
+    uint8_t  acpi_disable;           /* Value to write to smi_cmd to disable ACPI */
0a122b
+    uint8_t  S4bios_req;             /* Value to write to SMI CMD to enter S4BIOS state */
0a122b
+    uint8_t  reserved2;              /* Reserved - must be zero */
0a122b
+    uint32_t pm1a_evt_blk;           /* Port address of Power Mgt 1a acpi_event Reg Blk */
0a122b
+    uint32_t pm1b_evt_blk;           /* Port address of Power Mgt 1b acpi_event Reg Blk */
0a122b
+    uint32_t pm1a_cnt_blk;           /* Port address of Power Mgt 1a Control Reg Blk */
0a122b
+    uint32_t pm1b_cnt_blk;           /* Port address of Power Mgt 1b Control Reg Blk */
0a122b
+    uint32_t pm2_cnt_blk;            /* Port address of Power Mgt 2 Control Reg Blk */
0a122b
+    uint32_t pm_tmr_blk;             /* Port address of Power Mgt Timer Ctrl Reg Blk */
0a122b
+    uint32_t gpe0_blk;               /* Port addr of General Purpose acpi_event 0 Reg Blk */
0a122b
+    uint32_t gpe1_blk;               /* Port addr of General Purpose acpi_event 1 Reg Blk */
0a122b
+    uint8_t  pm1_evt_len;            /* Byte length of ports at pm1_x_evt_blk */
0a122b
+    uint8_t  pm1_cnt_len;            /* Byte length of ports at pm1_x_cnt_blk */
0a122b
+    uint8_t  pm2_cnt_len;            /* Byte Length of ports at pm2_cnt_blk */
0a122b
+    uint8_t  pm_tmr_len;             /* Byte Length of ports at pm_tm_blk */
0a122b
+    uint8_t  gpe0_blk_len;           /* Byte Length of ports at gpe0_blk */
0a122b
+    uint8_t  gpe1_blk_len;           /* Byte Length of ports at gpe1_blk */
0a122b
+    uint8_t  gpe1_base;              /* Offset in gpe model where gpe1 events start */
0a122b
+    uint8_t  reserved3;              /* Reserved */
0a122b
+    uint16_t plvl2_lat;              /* Worst case HW latency to enter/exit C2 state */
0a122b
+    uint16_t plvl3_lat;              /* Worst case HW latency to enter/exit C3 state */
0a122b
+    uint16_t flush_size;             /* Size of area read to flush caches */
0a122b
+    uint16_t flush_stride;           /* Stride used in flushing caches */
0a122b
+    uint8_t  duty_offset;            /* Bit location of duty cycle field in p_cnt reg */
0a122b
+    uint8_t  duty_width;             /* Bit width of duty cycle field in p_cnt reg */
0a122b
+    uint8_t  day_alrm;               /* Index to day-of-month alarm in RTC CMOS RAM */
0a122b
+    uint8_t  mon_alrm;               /* Index to month-of-year alarm in RTC CMOS RAM */
0a122b
+    uint8_t  century;                /* Index to century in RTC CMOS RAM */
0a122b
+    uint8_t  reserved4;              /* Reserved */
0a122b
+    uint8_t  reserved4a;             /* Reserved */
0a122b
+    uint8_t  reserved4b;             /* Reserved */
0a122b
+    uint32_t flags;
0a122b
+} QEMU_PACKED;
0a122b
+typedef struct AcpiFadtDescriptorRev1 AcpiFadtDescriptorRev1;
0a122b
+
0a122b
+/*
0a122b
+ * ACPI 1.0 Root System Description Table (RSDT)
0a122b
+ */
0a122b
+#define ACPI_RSDT_SIGNATURE 0x54445352 // RSDT
0a122b
+struct AcpiRsdtDescriptorRev1
0a122b
+{
0a122b
+    ACPI_TABLE_HEADER_DEF       /* ACPI common table header */
0a122b
+    uint32_t table_offset_entry[0];  /* Array of pointers to other */
0a122b
+    /* ACPI tables */
0a122b
+} QEMU_PACKED;
0a122b
+typedef struct AcpiRsdtDescriptorRev1 AcpiRsdtDescriptorRev1;
0a122b
+
0a122b
+/*
0a122b
+ * ACPI 1.0 Firmware ACPI Control Structure (FACS)
0a122b
+ */
0a122b
+#define ACPI_FACS_SIGNATURE 0x53434146 // FACS
0a122b
+struct AcpiFacsDescriptorRev1
0a122b
+{
0a122b
+    uint32_t signature;           /* ACPI Signature */
0a122b
+    uint32_t length;                 /* Length of structure, in bytes */
0a122b
+    uint32_t hardware_signature;     /* Hardware configuration signature */
0a122b
+    uint32_t firmware_waking_vector; /* ACPI OS waking vector */
0a122b
+    uint32_t global_lock;            /* Global Lock */
0a122b
+    uint32_t flags;
0a122b
+    uint8_t  resverved3 [40];        /* Reserved - must be zero */
0a122b
+} QEMU_PACKED;
0a122b
+typedef struct AcpiFacsDescriptorRev1 AcpiFacsDescriptorRev1;
0a122b
+
0a122b
+/*
0a122b
+ * Differentiated System Description Table (DSDT)
0a122b
+ */
0a122b
+#define ACPI_DSDT_SIGNATURE 0x54445344 // DSDT
0a122b
+
0a122b
+/*
0a122b
+ * MADT values and structures
0a122b
+ */
0a122b
+
0a122b
+/* Values for MADT PCATCompat */
0a122b
+
0a122b
+#define ACPI_DUAL_PIC                0
0a122b
+#define ACPI_MULTIPLE_APIC           1
0a122b
+
0a122b
+/* Master MADT */
0a122b
+
0a122b
+#define ACPI_APIC_SIGNATURE 0x43495041 // APIC
0a122b
+struct AcpiMultipleApicTable
0a122b
+{
0a122b
+    ACPI_TABLE_HEADER_DEF     /* ACPI common table header */
0a122b
+    uint32_t local_apic_address;     /* Physical address of local APIC */
0a122b
+    uint32_t flags;
0a122b
+} QEMU_PACKED;
0a122b
+typedef struct AcpiMultipleApicTable AcpiMultipleApicTable;
0a122b
+
0a122b
+/* Values for Type in APIC sub-headers */
0a122b
+
0a122b
+#define ACPI_APIC_PROCESSOR          0
0a122b
+#define ACPI_APIC_IO                 1
0a122b
+#define ACPI_APIC_XRUPT_OVERRIDE     2
0a122b
+#define ACPI_APIC_NMI                3
0a122b
+#define ACPI_APIC_LOCAL_NMI          4
0a122b
+#define ACPI_APIC_ADDRESS_OVERRIDE   5
0a122b
+#define ACPI_APIC_IO_SAPIC           6
0a122b
+#define ACPI_APIC_LOCAL_SAPIC        7
0a122b
+#define ACPI_APIC_XRUPT_SOURCE       8
0a122b
+#define ACPI_APIC_RESERVED           9           /* 9 and greater are reserved */
0a122b
+
0a122b
+/*
0a122b
+ * MADT sub-structures (Follow MULTIPLE_APIC_DESCRIPTION_TABLE)
0a122b
+ */
0a122b
+#define ACPI_SUB_HEADER_DEF   /* Common ACPI sub-structure header */\
0a122b
+    uint8_t  type;                               \
0a122b
+    uint8_t  length;
0a122b
+
0a122b
+/* Sub-structures for MADT */
0a122b
+
0a122b
+struct AcpiMadtProcessorApic
0a122b
+{
0a122b
+    ACPI_SUB_HEADER_DEF
0a122b
+    uint8_t  processor_id;           /* ACPI processor id */
0a122b
+    uint8_t  local_apic_id;          /* Processor's local APIC id */
0a122b
+    uint32_t flags;
0a122b
+} QEMU_PACKED;
0a122b
+typedef struct AcpiMadtProcessorApic AcpiMadtProcessorApic;
0a122b
+
0a122b
+struct AcpiMadtIoApic
0a122b
+{
0a122b
+    ACPI_SUB_HEADER_DEF
0a122b
+    uint8_t  io_apic_id;             /* I/O APIC ID */
0a122b
+    uint8_t  reserved;               /* Reserved - must be zero */
0a122b
+    uint32_t address;                /* APIC physical address */
0a122b
+    uint32_t interrupt;              /* Global system interrupt where INTI
0a122b
+                                 * lines start */
0a122b
+} QEMU_PACKED;
0a122b
+typedef struct AcpiMadtIoApic AcpiMadtIoApic;
0a122b
+
0a122b
+struct AcpiMadtIntsrcovr {
0a122b
+    ACPI_SUB_HEADER_DEF
0a122b
+    uint8_t  bus;
0a122b
+    uint8_t  source;
0a122b
+    uint32_t gsi;
0a122b
+    uint16_t flags;
0a122b
+} QEMU_PACKED;
0a122b
+typedef struct AcpiMadtIntsrcovr AcpiMadtIntsrcovr;
0a122b
+
0a122b
+struct AcpiMadtLocalNmi {
0a122b
+    ACPI_SUB_HEADER_DEF
0a122b
+    uint8_t  processor_id;           /* ACPI processor id */
0a122b
+    uint16_t flags;                  /* MPS INTI flags */
0a122b
+    uint8_t  lint;                   /* Local APIC LINT# */
0a122b
+} QEMU_PACKED;
0a122b
+typedef struct AcpiMadtLocalNmi AcpiMadtLocalNmi;
0a122b
+
0a122b
+/*
0a122b
+ * HPET Description Table
0a122b
+ */
0a122b
+#define ACPI_HPET_SIGNATURE 0x54455048 // HPET
0a122b
+struct Acpi20Hpet {
0a122b
+    ACPI_TABLE_HEADER_DEF                    /* ACPI common table header */
0a122b
+    uint32_t           timer_block_id;
0a122b
+    Acpi20GenericAddress addr;
0a122b
+    uint8_t            hpet_number;
0a122b
+    uint16_t           min_tick;
0a122b
+    uint8_t            page_protect;
0a122b
+} QEMU_PACKED;
0a122b
+typedef struct Acpi20Hpet Acpi20Hpet;
0a122b
+
0a122b
+/*
0a122b
+ * SRAT (NUMA topology description) table
0a122b
+ */
0a122b
+
0a122b
+#define ACPI_SRAT_SIGNATURE 0x54415253 // SRAT
0a122b
+struct AcpiSystemResourceAffinityTable
0a122b
+{
0a122b
+    ACPI_TABLE_HEADER_DEF
0a122b
+    uint32_t    reserved1;
0a122b
+    uint32_t    reserved2[2];
0a122b
+} QEMU_PACKED;
0a122b
+typedef struct AcpiSystemResourceAffinityTable AcpiSystemResourceAffinityTable;
0a122b
+
0a122b
+#define ACPI_SRAT_PROCESSOR          0
0a122b
+#define ACPI_SRAT_MEMORY             1
0a122b
+
0a122b
+struct AcpiSratProcessorAffinity
0a122b
+{
0a122b
+    ACPI_SUB_HEADER_DEF
0a122b
+    uint8_t     proximity_lo;
0a122b
+    uint8_t     local_apic_id;
0a122b
+    uint32_t    flags;
0a122b
+    uint8_t     local_sapic_eid;
0a122b
+    uint8_t     proximity_hi[3];
0a122b
+    uint32_t    reserved;
0a122b
+} QEMU_PACKED;
0a122b
+typedef struct AcpiSratProcessorAffinity AcpiSratProcessorAffinity;
0a122b
+
0a122b
+struct AcpiSratMemoryAffinity
0a122b
+{
0a122b
+    ACPI_SUB_HEADER_DEF
0a122b
+    uint8_t     proximity[4];
0a122b
+    uint16_t    reserved1;
0a122b
+    uint64_t    base_addr;
0a122b
+    uint64_t    range_length;
0a122b
+    uint32_t    reserved2;
0a122b
+    uint32_t    flags;
0a122b
+    uint32_t    reserved3[2];
0a122b
+} QEMU_PACKED;
0a122b
+typedef struct AcpiSratMemoryAffinity AcpiSratMemoryAffinity;
0a122b
+
0a122b
+/* PCI fw r3.0 MCFG table. */
0a122b
+/* Subtable */
0a122b
+struct AcpiMcfgAllocation {
0a122b
+    uint64_t address;                /* Base address, processor-relative */
0a122b
+    uint16_t pci_segment;            /* PCI segment group number */
0a122b
+    uint8_t start_bus_number;       /* Starting PCI Bus number */
0a122b
+    uint8_t end_bus_number;         /* Final PCI Bus number */
0a122b
+    uint32_t reserved;
0a122b
+} QEMU_PACKED;
0a122b
+typedef struct AcpiMcfgAllocation AcpiMcfgAllocation;
0a122b
+
0a122b
+#define ACPI_MCFG_SIGNATURE 0x4746434d       // MCFG
0a122b
+
0a122b
+/* Reserved signature: ignored by OSPM */
0a122b
+#define ACPI_RSRV_SIGNATURE 0x554d4551       // QEMU
0a122b
+
0a122b
+struct AcpiTableMcfg {
0a122b
+    ACPI_TABLE_HEADER_DEF;
0a122b
+    uint8_t reserved[8];
0a122b
+    AcpiMcfgAllocation allocation[0];
0a122b
+} QEMU_PACKED;
0a122b
+typedef struct AcpiTableMcfg AcpiTableMcfg;
0a122b
+
0a122b
+#endif
0a122b
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
0a122b
index 041e537..320f668 100644
0a122b
--- a/hw/i386/pc.c
0a122b
+++ b/hw/i386/pc.c
0a122b
@@ -56,6 +56,7 @@
0a122b
 #include "hw/cpu/icc_bus.h"
0a122b
 #include "hw/boards.h"
0a122b
 #include "hw/pci/pci_host.h"
0a122b
+#include "acpi-build.h"
0a122b
 
0a122b
 /* debug PC/ISA interrupts */
0a122b
 //#define DEBUG_IRQ
0a122b
@@ -1035,6 +1036,7 @@ void pc_guest_info_machine_done(Notifier *notifier, void *data)
0a122b
                                                       PcGuestInfoState,
0a122b
                                                       machine_done);
0a122b
     pc_fw_cfg_guest_info(&guest_info_state->info);
0a122b
+    acpi_setup(&guest_info_state->info);
0a122b
 }
0a122b
 
0a122b
 PcGuestInfo *pc_guest_info_init(ram_addr_t below_4g_mem_size,
0a122b
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
0a122b
index 211ff8e..ffa35d3 100644
0a122b
--- a/hw/i386/pc_piix.c
0a122b
+++ b/hw/i386/pc_piix.c
0a122b
@@ -60,6 +60,7 @@ static const int ide_irq[MAX_IDE_BUS] = { 14, 15 };
0a122b
 
0a122b
 static bool smbios_type1_defaults = true;
0a122b
 static bool has_pci_info = true;
0a122b
+static bool has_acpi_build = true;
0a122b
 
0a122b
 /* PC hardware initialisation */
0a122b
 static void pc_init1(QEMUMachineInitArgs *args,
0a122b
@@ -123,6 +124,9 @@ static void pc_init1(QEMUMachineInitArgs *args,
0a122b
     }
0a122b
 
0a122b
     guest_info = pc_guest_info_init(below_4g_mem_size, above_4g_mem_size);
0a122b
+
0a122b
+    guest_info->has_acpi_build = has_acpi_build;
0a122b
+
0a122b
     guest_info->has_pci_info = has_pci_info;
0a122b
 
0a122b
     /* allocate ram and load rom/bios */
0a122b
@@ -899,6 +903,7 @@ static void pc_init_rhel650(QEMUMachineInitArgs *args)
0a122b
                                 0, CPUID_EXT2_RDTSCP);
0a122b
 
0a122b
     rom_file_in_ram = false; 
0a122b
+    has_acpi_build = false;
0a122b
     pc_init_rhel700(args);
0a122b
 }
0a122b
 
0a122b
diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
0a122b
index 7a58b61..824295d 100644
0a122b
--- a/hw/i386/pc_q35.c
0a122b
+++ b/hw/i386/pc_q35.c
0a122b
@@ -50,6 +50,7 @@
0a122b
 
0a122b
 static bool smbios_type1_defaults = true;
0a122b
 static bool has_pci_info = true;
0a122b
+static bool has_acpi_build = true;
0a122b
 
0a122b
 /* PC hardware initialisation */
0a122b
 static void pc_q35_init(QEMUMachineInitArgs *args)
0a122b
@@ -110,6 +111,7 @@ static void pc_q35_init(QEMUMachineInitArgs *args)
0a122b
 
0a122b
     guest_info = pc_guest_info_init(below_4g_mem_size, above_4g_mem_size);
0a122b
     guest_info->has_pci_info = has_pci_info;
0a122b
+    guest_info->has_acpi_build = has_acpi_build;
0a122b
 
0a122b
     /* allocate ram and load rom/bios */
0a122b
     if (!xen_enabled()) {
0a122b
diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
0a122b
index 8793715..5c69abe 100644
0a122b
--- a/include/hw/i386/pc.h
0a122b
+++ b/include/hw/i386/pc.h
0a122b
@@ -41,6 +41,7 @@ struct PcGuestInfo {
0a122b
     uint64_t *node_mem;
0a122b
     uint64_t *node_cpu;
0a122b
     FWCfgState *fw_cfg;
0a122b
+    bool has_acpi_build;
0a122b
 };
0a122b
 
0a122b
 /* parallel.c */
0a122b
-- 
0a122b
1.7.11.7
0a122b