Johnny Hughes
2019-02-04 c1f36c28393a7bb126cbf436cd6a4077a5b5c313
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From 999d3c8c40286fc57dfcd194a1b7548b975ec875 Mon Sep 17 00:00:00 2001
From: Khuong Dinh <khuong.dinh@amperecomputing.com>
Date: Wed, 31 Jan 2018 15:55:24 +0000
Subject: [PATCH 02/11] BACKPORT: arm64: barrier: Implement
 smp_cond_load_relaxed
 
We can provide an implementation of smp_cond_load_relaxed using READ_ONCE
and __cmpwait_relaxed.
 
This patch is required to fix kernel lock up due to new implementation of
queued read write locking from kernel 4.14.
This patch is backported from:
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?h=next-20180913&id=598865c5f32d6e11e99f2aac07348e5fd17cdc03
 
Change-Id: I69a663a3c84301479f5b077f1dd7a342938b92cf
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Khuong Dinh <khuong.dinh@amperecomputing.com>
---
 arch/arm64/include/asm/barrier.h | 13 +++++++++++++
 1 file changed, 13 insertions(+)
 
diff --git a/arch/arm64/include/asm/barrier.h b/arch/arm64/include/asm/barrier.h
index 6133f3e..bc814e8 100644
--- a/arch/arm64/include/asm/barrier.h
+++ b/arch/arm64/include/asm/barrier.h
@@ -182,6 +182,19 @@ static inline unsigned long array_index_mask_nospec(unsigned long idx,
     __u.__val;                            \
 })
 
+#define smp_cond_load_relaxed(ptr, cond_expr)                \
+({                                    \
+    typeof(ptr) __PTR = (ptr);                    \
+    typeof(*ptr) VAL;                        \
+    for (;;) {                            \
+        VAL = READ_ONCE(*__PTR);                \
+        if (cond_expr)                        \
+            break;                        \
+        __cmpwait_relaxed(__PTR, VAL);                \
+    }                                \
+    VAL;                                \
+})
+
 #define smp_cond_load_acquire(ptr, cond_expr)                \
 ({                                    \
     typeof(ptr) __PTR = (ptr);                    \
-- 
1.8.3.1